A method of selectively removing NiPt material from a microelectronic substrate, the method comprising contacting the NiPt material with an aqueous etching composition comprising: an oxidising agent; a strong acid; and a source of chloride.

The reliability of a transistor including an oxide semiconductor can be improved by suppressing a change in electrical characteristics. A transistor included in a semiconductor device includes a first oxide semiconductor film over a first insulating film, a gate insulating film over the first oxide semiconductor film, a second oxide semiconductor film over the gate insulating film, and a second insulating film over the first oxide semiconductor film and the second oxide semiconductor film. The first oxide semiconductor film includes a channel region in contact with the gate insulating film, a source region in contact with the second insulating film, and a drain region in contact with the second insulating film. The second oxide semiconductor film has a higher carrier density than the first oxide semiconductor film.

A method of manufacturing a semiconductor device includes forming a first alignment mark trench in a first material layer on a substrate. A first alignment mark via may then be formed by etching a second material layer that is underneath the first material layer, where the first alignment mark via is positioned to communicate with the first alignment mark trench. Then, a trench-via-merged-type first alignment mark may be formed by filling the first alignment mark trench and the first alignment mark via with a light reflection material layer.

A manufacturing method forms an oxide insulating layer and a first plasma etching treatment forms a depressed portion therein. A second plasma etching treatment forms a trench including curved lower corner portions. An oxide semiconductor film is formed in contact with a bottom portion, the curved lower corner portions, and side portions of the trench. Source and electrodes are formed to be electrically connected to the oxide semiconductor film. A gate insulating layer is formed over the oxide semiconductor film and a gate electrode is formed over the gate insulating layer. The first plasma etching treatment is performed with a first bias power and a first power of a first power source, and the second plasma etching treatment is performed with a second bias power and a second power of a second power source, wherein the second bias power is lower than the first bias power.

MMIC circuits with thin film transistors are provided without the need of grinding and etching of the substrate after the fabrication of active and passive components. Furthermore, technology for active devices based on non-toxic compound semiconductors is provided. The success in the MMIC methods and structures without substrate grinding/etching and the use of semiconductors without toxic elements for active components will reduce manufacturing time, decrease economic cost and environmental burden. MMIC structures are provided where the requirements for die or chip attachment, alignment and wire bonding are eliminated completely or minimized. This will increase the reproducibility and reduce the manufacturing time for the MMIC circuits and modules.

An anti-electrostatic device used in an array substrate of a liquid crystal display and a method for manufacturing the same, and a substrate are disclosed. The method includes steps of: forming a first insulation layer on a first conductive layer; forming a pattern on the first insulation layer; forming an etching barrier layer on the pattern; forming a first via hole and a second via hole extending through the etching barrier layer, and forming a fifth via hole extending through the etching barrier layer and the first insulation layer; forming a second conductive layer on the etching barrier layer, wherein a first portion and a second portion of the second conductive layer are respectively electrically connected to the pattern via the first via hole and the second via hole, and one of them is electrically connected to the first conductive layer via a fifth via hole.

The present invention provides an etching liquid which has a suitable etching rate for etching of an oxide containing zinc and tin and is suppressed in change of the etching rate due to dissolution of the oxide, while being free from the generation of a precipitate. The corrosiveness of this etching liquid to wiring materials is low enough to be ignored, and this etching liquid has excellent linearity of a pattern shape. The present invention uses an etching liquid which contains (A) one or more substances selected from the group consisting of sulfuric acid, nitric acid, hydrochloric acid, methanesulfonic acid, perchloric acid and salts of these acids, and (B) oxalic acid or a salt thereof and water, and which has a pH of from −1 to 1.

Techniques are provided to remove the growth of colloidal silica deposits on surfaces of high aspect ratio structures during silicon nitride etch steps. A high selectivity overetch step is used to remove the deposited colloidal silica. The disclosed techniques include the use of phosphoric acid to remove silicon nitride from structures having silicon nitride formed in narrow gap or trench structures having high aspect ratios in which formation of colloidal silica deposits on a surface of the narrow gap or trench through a hydrolysis reaction occurs. A second etch step is used in which the hydrolysis reaction which formed the colloidal silica deposits is reversible, and with the now lower concentration of silica in the nearby phosphoric acid due to the depletion of the silicon nitride, the equilibrium drives the reaction in the reverse direction, dissolving the deposited silica back into solution.

An electronic skin is manufactured by disposing an oxide thin film transistor (TFT), a pressure sensor, and a temperature sensor on a flexible substrate. The pressure sensor and the temperature sensor are respectively located on two sides of the flexible substrate. The oxide TFT includes a first TFT and a second TFT. The pressure sensor is configured to drive the first TFT, and the temperature sensor is configured to drive the second TFT. The method for preparing the electronic skin is to form an oxide TFT, a pressure sensor, and a temperature sensor by means of etching and deposition on a flexible substrate whose double sides are covered with conductive materials. The electronic skin provided in the present invention may simultaneously measure pressure and temperatures, and has a simple structure, a low working voltage, small power consumption, high sensitivity, and small interference between sensor signals.

A semiconductor device includes a first oxide insulating layer over a first insulating layer, an oxide semiconductor layer over the first oxide insulating layer, a source electrode layer and a drain electrode layer over the oxide semiconductor layer, a second insulating layer over the source electrode layer and the drain electrode layer, a second oxide insulating layer over the oxide semiconductor layer, a gate insulating layer over the second oxide insulating layer, a gate electrode layer over the gate insulating layer, and a third insulating layer over the second insulating layer, the second oxide insulating layer, the gate insulating layer, and the gate electrode layer. A side surface portion of the second insulating layer is in contact with the second oxide insulating layer. The gate electrode layer includes a first region and a second region. The first region has a width larger than that of the second region.