Described are microelectronic device comprising a dielectric layer formed on a substrate, a feature 206 comprising a gap defined in the dielectric layer, a barrier layer on the dielectric layer, a two metal liner film on the barrier layer and a gap fill metal on the two metal liner. Embodiments provide a method of forming an microelectronic device comprising the two metal liner film on the barrier layer.

A semiconductor device includes a first interlayer insulating film disposed on a substrate and having a first trench. A first lower conductive pattern fills the first trench and includes first and second valley areas that are spaced apart from each other in a first direction parallel to an upper surface of the substrate. The first and second valley areas are recessed toward the substrate. A second interlayer insulating film is disposed on the first interlayer insulating film and includes a second trench that exposes at least a portion of the first lower conductive pattern. An upper conductive pattern fills the second trench and includes an upper barrier film and an upper filling film disposed on the upper barrier film. The upper conductive pattern at least partially fills the first valley area.

A structure includes a first conductive feature in a first dielectric layer; a second dielectric layer over the first dielectric layer; and a second conductive feature extending through the second dielectric layer to physically contact the first conductive feature, wherein the second conductive feature includes a metal adhesion layer over and physically contacting the first conductive feature; a barrier layer extending along sidewalls of the second dielectric layer; and a conductive filling material extending over the metal adhesion layer and the barrier layer, wherein a portion of the conductive filling material extends between the barrier layer and the metal adhesion layer.

A structure includes a first conductive feature in a first dielectric layer; a second dielectric layer over the first dielectric layer; and a second conductive feature extending through the second dielectric layer to physically contact the first conductive feature, wherein the second conductive feature includes a metal adhesion layer over and physically contacting the first conductive feature; a barrier layer extending along sidewalls of the second dielectric layer; and a conductive filling material extending over the metal adhesion layer and the barrier layer, wherein a portion of the conductive filling material extends between the barrier layer and the metal adhesion layer.

A semiconductor device includes a fin structure, a source/drain region, a first inter-layer dielectric (ILD) layer, a first contact plug, and a second contact plug. The fin structure extends above a substrate. The source/drain region is in the fin structure. The first ILD layer is over the source/drain region. The first contact plug extends through the first ILD layer to a silicide region of the source/drain region. The second contact plug is over the first contact plug. The first contact plug has a protruding portion extending above the first ILD layer and laterally surrounding a lower part of the second contact plug.

Methods of forming copper interconnects are described. A doped tantalum nitride layer formed on a copper layer on a substrate has a first amount of dopant. The doped tantalum nitride layer is exposed to a plasma comprising one or more of helium or neon to form a treated doped tantalum nitride layer with a decreased amount of dopant. Apparatus for performing the methods are also described.

Embodiments of the invention provide processes to selectively form a cobalt layer on a copper surface over exposed dielectric surfaces. In one embodiment, a method for capping a copper surface on a substrate is provided which includes positioning a substrate within a processing chamber, wherein the substrate contains a contaminated copper surface and a dielectric surface, exposing the contaminated copper surface to a reducing agent while forming a copper surface during a pre-treatment process, exposing the substrate to a cobalt precursor gas to selectively form a cobalt capping layer over the copper surface while leaving exposed the dielectric surface during a vapor deposition process, and depositing a dielectric barrier layer over the cobalt capping layer and the dielectric surface. In another embodiment, a deposition-treatment cycle includes performing the vapor deposition process and subsequently a post-treatment process, which deposition-treatment cycle may be repeated to form multiple cobalt capping layers.

Substantially carbon-free molybdenum-containing and tungsten-containing films are deposited on semiconductor substrates using halide-free metalorganic precursors. The precursors do not include metal-carbon bonds, carbonyl ligands, and, preferably do not include beta-hydrogen atoms. Metal-containing films, such as molybdenum nitride, molybdenum oxynitride, molybdenum silicide, and molybdenum boride with carbon content of less than about 5% atomic, such as less than about 3% atomic are deposited. The films are deposited in some embodiments by reacting the metal-containing precursor with a reactant on a surface of a substrate in an absence of plasma, e.g. using several ALD cycles. In some embodiments the formed film is then treated with a second reactant in a plasma to modify its properties (e.g., to densify the film, to reduce resistivity of the film, or to increase its work function). The films can be used as liners, diffusion barriers, and as electrode material in pMOS devices.

Embodiments of the invention provide processes to selectively form a cobalt layer on a copper surface over exposed dielectric surfaces. In one embodiment, a method for capping a copper surface on a substrate is provided which includes positioning a substrate within a processing chamber, wherein the substrate contains a contaminated copper surface and a dielectric surface, exposing the contaminated copper surface to a reducing agent while forming a copper surface during a pre-treatment process, exposing the substrate to a cobalt precursor gas to selectively form a cobalt capping layer over the copper surface while leaving exposed the dielectric surface during a vapor deposition process, and depositing a dielectric barrier layer over the cobalt capping layer and the dielectric surface. In another embodiment, a deposition-treatment cycle includes performing the vapor deposition process and subsequently a post-treatment process, which deposition-treatment cycle may be repeated to form multiple cobalt capping layers.

Embodiments disclosed herein relate generally to forming an effective metal diffusion barrier in sidewalls of epitaxy source/drain regions. In an embodiment, a structure includes an active area having a source/drain region on a substrate, a dielectric layer over the active area and having a sidewall aligned with the sidewall of the source/drain region, and a conductive feature along the sidewall of the dielectric layer to the source/drain region. The source/drain region has a sidewall and a lateral surface extending laterally from the sidewall of the source/drain region, and the source/drain region further includes a nitrided region extending laterally from the sidewall of the source/drain region into the source/drain region. The conductive feature includes a silicide region along the lateral surface of the source/drain region and along at least a portion of the sidewall of the source/drain region.