A resistive element includes: a semiconductor substrate; a lower insulating film deposited on the semiconductor substrate; a resistive layer deposited on the lower insulating film; an interlayer insulating film covering the resistive layer; a pad-forming electrode deposited on the interlayer insulating film, and including a first edge portion connected to one edge portion of the resistive layer and a second edge portion opposite to the first edge portion to be in electrical Schottky contact with the semiconductor substrate; a relay wire having one edge connected to another edge portion of the resistive layer to form an ohmic contact to the semiconductor substrate; and a counter electrode provided under the semiconductor substrate, wherein the resistive element uses a resistance value between the pad-forming electrode and the counter electrode.

A resistive element includes: a semiconductor substrate; a lower insulating film deposited on the semiconductor substrate; a resistive layer deposited on the lower insulating film; an interlayer insulating film covering the resistive layer; a pad-forming electrode deposited on the interlayer insulating film, and including a first edge portion connected to one edge portion of the resistive layer and a second edge portion opposite to the first edge portion to be in electrical Schottky contact with the semiconductor substrate; a relay wire having one edge connected to another edge portion of the resistive layer to form an ohmic contact to the semiconductor substrate; and a counter electrode provided under the semiconductor substrate, wherein the resistive element uses a resistance value between the pad-forming electrode and the counter electrode.

A semiconductor device according to the present disclosure includes a semiconductor substrate, a first electrode provided on the semiconductor substrate, an insulating layer including a first part provided on an upper surface of the first electrode, a second electrode including a main portion and an eaves portion, the main portion being provided on the upper surface of the first electrode, the eaves portion extending over the first part and solder covering an upper surface of the main portion and a part of an upper surface of the eaves portion wherein the insulating layer includes a second part covering a part of the upper surface of the eaves portion, the part being closer to an end portion of the eaves portion than the part covered by the solder and a third part connecting the first part and the second part and covering the end portion of the eaves portion.

An integrated circuit device (100) and method comprising an IC chip (102) having metal interconnect levels (M1-Mn) including a last copper interconnect level (Mn) and a chip-to-package interconnect (110) overlying and connected to the last copper interconnect level (Mn). The chip-to-package interconnect (110) having a via (112) connected to a first element (306a) of the last copper interconnect level (Mn) and a copper conductive structure (118) (e.g., bump copper). The via (112) includes a barrier material (112a) and a tungsten fill layer (112b), the via coupled between the copper conductive structure (118) and the first element (306a).

A display device having a pad area and a display area is provided. The display device includes: a substrate; a pad structure on the substrate in the pad area; and a display element part on the substrate in the display area. The pad structure includes a first pad pattern, a second pad pattern on the first pad pattern, and a third pad pattern on the second pad pattern, and the display element part includes a light emitting element configured to emit light in a display direction. The second pad pattern has a first area and a second area, the second pad pattern and the third pad pattern do not contact each other in the first area, and the second pad pattern and the third pad pattern contact each other in the second area.

A light source unit for a display device includes: a printed circuit board including a soldering pad located on a substrate of glass and including a copper layer, and a first diffusing barrier pattern located on the soldering pad and including a molybdenum alloy; and a light emitting diode mounted on the soldering pad through a solder resist. In one embodiment, the printed circuit board is a glass printed circuit board.

An SiC semiconductor device includes an SiC chip having a first main surface at one side and a second main surface at another side, a first main surface electrode including a first Al layer and formed on the first main surface, a pad electrode formed on the first main surface electrode and to be connected to a lead wire, and a second main surface electrode including a second Al layer and formed on the second main surface.

An SiC semiconductor device includes an SiC chip having a first main surface at one side and a second main surface at another side, a first main surface electrode including a first Al layer and formed on the first main surface, a pad electrode formed on the first main surface electrode and to be connected to a lead wire, and a second main surface electrode including a second Al layer and formed on the second main surface.

A method of fabricating an under-bump metallurgy (UBM) structure that is free of gold processing includes forming a titanium layer on top of a far back of line (FBEOL) of a semiconductor. A first copper layer is formed on top of the titanium layer. A photoresist (PR) layer is formed on top of the first copper layer between traces of the FBEOL to provide a cavity to the FBEOL traces. A top copper layer is formed on top of the first copper layer. A protective surface layer (PSL) is formed on top of the top copper layer.

A display device may include: a substrate including a display area having first to third areas, and a non-display area; first pixels in the first area, second pixels in the second area, and third pixels in the third area; a pad part located in the non-display area, and electrically connected to the first to third pixels; a line part including a first line between the pad part and the first area, a second line between the pad part and the second area, and a third line between the pad part and the second area; a bridge line extending in a first direction, and located in the second and third areas; and an extension line extending in a second direction, and located in the second area and electrically connected with the bridge line. The extension line may be electrically connected with the third line.