H01L2224/05601

METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES

A method of manufacturing a semiconductor device according to example embodiments includes: sequentially forming first through third insulating layers on a substrate; forming an opening by etching the first through third insulating layers; forming a conductive layer configured in the opening; forming a fourth insulating layer in the opening after the forming of the conductive layer; and removing a portion of an edge region of the substrate after the forming of the fourth insulating layer.

SEMICONDUCTOR ELEMENT AND SEMICONDUCTOR DEVICE
20210217854 · 2021-07-15 ·

The semiconductor element and the semiconductor device according to the disclosure is excellent in electrical characteristics are provided. A semiconductor element, including: an electrode, and the electrode having a corundum structure. The semiconductor element is used to make a semiconductor device such as a power card. Also, the semiconductor element and the semiconductor device are used to make a semiconductor system.

SEMICONDUCTOR ELEMENT AND SEMICONDUCTOR DEVICE
20210217854 · 2021-07-15 ·

The semiconductor element and the semiconductor device according to the disclosure is excellent in electrical characteristics are provided. A semiconductor element, including: an electrode, and the electrode having a corundum structure. The semiconductor element is used to make a semiconductor device such as a power card. Also, the semiconductor element and the semiconductor device are used to make a semiconductor system.

Package structure and method for fabricating the same

A package structure and a method for fabricating the same are provided. An electronic component such as a sensing chip and a conductive element such as a bonding wire are mounted to a carrier, encapsulated by an encapsulant, and electrically connected through a conductive layer. As such, the electronic component can further be electrically connected to the carrier through the conductive layer and the conductive element. Therefore, the sensing chip can be packaged through current packaging processes, thereby reducing the fabrication cost, shortening the fabrication time and improving the product yield.

METHOD FOR TRANSIENT LIQUID-PHASE BONDING BETWEEN METAL MATERIALS USING A MAGNETIC FORCE

Disclosed is a method for transient liquid-phase bonding between metal materials using a magnetic force. In particular, in the method, a magnetic force is applied to a transient liquid-phase bonding process, thereby shortening a transient liquid-phase bonding time between the metal materials, and obtaining high bonding strength. To this end, an attractive magnetic force is applied to a ferromagnetic base while a repulsive magnetic force is applied to a diamagnetic base, thereby to accelerate diffusion. This may reduce a bonding time during a transient liquid-phase bonding process between two bases and suppress formation of Kirkendall voids and voids and suppress a layered structure of an intermetallic compound, thereby to increase a bonding strength.

METHOD FOR TRANSIENT LIQUID-PHASE BONDING BETWEEN METAL MATERIALS USING A MAGNETIC FORCE

Disclosed is a method for transient liquid-phase bonding between metal materials using a magnetic force. In particular, in the method, a magnetic force is applied to a transient liquid-phase bonding process, thereby shortening a transient liquid-phase bonding time between the metal materials, and obtaining high bonding strength. To this end, an attractive magnetic force is applied to a ferromagnetic base while a repulsive magnetic force is applied to a diamagnetic base, thereby to accelerate diffusion. This may reduce a bonding time during a transient liquid-phase bonding process between two bases and suppress formation of Kirkendall voids and voids and suppress a layered structure of an intermetallic compound, thereby to increase a bonding strength.

Semiconductor device packages and structures
10651050 · 2020-05-12 · ·

Semiconductor device packages may include a support structure having electrical connections therein. Semiconductor device modules may be located on a surface of the support structure. A molding material may at least partially surround each semiconductor module on the surface of the support structure. A thermal management device may be operatively connected to the semiconductor device modules on a side of the semiconductor device modules opposite the support structure. At least some of the semiconductor device modules may include a stack of semiconductor dice, at least two semiconductor dice in the stack being secured to one another by diffusion of electrically conductive material of electrically conductive elements into one another.

Semiconductor device packages and structures
10651050 · 2020-05-12 · ·

Semiconductor device packages may include a support structure having electrical connections therein. Semiconductor device modules may be located on a surface of the support structure. A molding material may at least partially surround each semiconductor module on the surface of the support structure. A thermal management device may be operatively connected to the semiconductor device modules on a side of the semiconductor device modules opposite the support structure. At least some of the semiconductor device modules may include a stack of semiconductor dice, at least two semiconductor dice in the stack being secured to one another by diffusion of electrically conductive material of electrically conductive elements into one another.

Method for minimizing average surface roughness of soft metal layer for bonding
10643848 · 2020-05-05 · ·

A method for minimizing an average surface includes: forming an epitaxial layer on a growth substrate; forming the soft metal layer on the epitaxial layer in which the average surface roughness of a bonding surface of the soft metal layer is greater than a first value; forming a glue layer on a carrier substrate; placing a combination of the glue layer and the carrier substrate on the bonding surface in which the glue layer being in contact with the bonding surface of the soft metal layer; and applying an external pressure to compress the glue layer and the soft metal layer such that the average surface roughness of the bonding surface of the soft metal layer is reduced from the first value to a second value, wherein the second value is less than 80 nm.

Method for minimizing average surface roughness of soft metal layer for bonding
10643848 · 2020-05-05 · ·

A method for minimizing an average surface includes: forming an epitaxial layer on a growth substrate; forming the soft metal layer on the epitaxial layer in which the average surface roughness of a bonding surface of the soft metal layer is greater than a first value; forming a glue layer on a carrier substrate; placing a combination of the glue layer and the carrier substrate on the bonding surface in which the glue layer being in contact with the bonding surface of the soft metal layer; and applying an external pressure to compress the glue layer and the soft metal layer such that the average surface roughness of the bonding surface of the soft metal layer is reduced from the first value to a second value, wherein the second value is less than 80 nm.