H01L2224/05601

Semiconductor device packages and related methods
10418255 · 2019-09-17 · ·

Semiconductor device packages may include a support structure having electrical connections therein. Semiconductor device modules may be located on a surface of the support structure. A molding material may at least partially surround each semiconductor module on the surface of the support structure. A thermal management device may be operatively connected to the semiconductor device modules on a side of the semiconductor device modules opposite the support structure. At least some of the semiconductor device modules may include a stack of semiconductor dice, at least two semiconductor dice in the stack being secured to one another by diffusion of electrically conductive material of electrically conductive elements into one another.

Semiconductor device packages and related methods
10418255 · 2019-09-17 · ·

Semiconductor device packages may include a support structure having electrical connections therein. Semiconductor device modules may be located on a surface of the support structure. A molding material may at least partially surround each semiconductor module on the surface of the support structure. A thermal management device may be operatively connected to the semiconductor device modules on a side of the semiconductor device modules opposite the support structure. At least some of the semiconductor device modules may include a stack of semiconductor dice, at least two semiconductor dice in the stack being secured to one another by diffusion of electrically conductive material of electrically conductive elements into one another.

SEMICONDUCTOR DEVICE PACKAGES AND STRUCTURES
20190273000 · 2019-09-05 ·

Semiconductor device packages may include a support structure having electrical connections therein. Semiconductor device modules may be located on a surface of the support structure. A molding material may at least partially surround each semiconductor module on the surface of the support structure. A thermal management device may be operatively connected to the semiconductor device modules on a side of the semiconductor device modules opposite the support structure. At least some of the semiconductor device modules may include a stack of semiconductor dice, at least two semiconductor dice in the stack being secured to one another by diffusion of electrically conductive material of electrically conductive elements into one another.

SEMICONDUCTOR DEVICE PACKAGES AND STRUCTURES
20190273000 · 2019-09-05 ·

Semiconductor device packages may include a support structure having electrical connections therein. Semiconductor device modules may be located on a surface of the support structure. A molding material may at least partially surround each semiconductor module on the surface of the support structure. A thermal management device may be operatively connected to the semiconductor device modules on a side of the semiconductor device modules opposite the support structure. At least some of the semiconductor device modules may include a stack of semiconductor dice, at least two semiconductor dice in the stack being secured to one another by diffusion of electrically conductive material of electrically conductive elements into one another.

Semiconductor packaging method and semiconductor package device
11990432 · 2024-05-21 · ·

The present disclosure provides a semiconductor packaging method and a semiconductor package device. The method includes providing a chip, where the chip includes a chip substrate having a front surface and a back surface; soldering pads disposed at the front surface of a chip substrate surrounding the photosensitive region; a metal part formed on a side of each soldering pad facing away from the chip substrate; and a transparent protective layer formed on the front surface of the chip substrate. A first end of the metal part away from a corresponding soldering pad is in coplanar with the transparent protective layer; and the first end of the metal part is not covered by the transparent protective layer. The method further includes electrically connecting the first end of the metal part to a circuit board using a conductive connection part to electrically connect the chip with the circuit board.

Semiconductor packaging method and semiconductor package device
11990432 · 2024-05-21 · ·

The present disclosure provides a semiconductor packaging method and a semiconductor package device. The method includes providing a chip, where the chip includes a chip substrate having a front surface and a back surface; soldering pads disposed at the front surface of a chip substrate surrounding the photosensitive region; a metal part formed on a side of each soldering pad facing away from the chip substrate; and a transparent protective layer formed on the front surface of the chip substrate. A first end of the metal part away from a corresponding soldering pad is in coplanar with the transparent protective layer; and the first end of the metal part is not covered by the transparent protective layer. The method further includes electrically connecting the first end of the metal part to a circuit board using a conductive connection part to electrically connect the chip with the circuit board.

Semiconductor structure and manufacturing method thereof
11984417 · 2024-05-14 · ·

The present disclosure relates to the technical field of semiconductors, and provides a semiconductor structure and a manufacturing method thereof. The semiconductor structure includes a first chip and a second chip. A first conductive connection wire of the first chip is connected to a first conductive contact pad, and a second conductive connection wire of the second chip is connected to a second conductive contact pad. In addition, the first conductive contact pad includes a first conductor group and a second conductor group, and the second conductive contact pad includes a third conductor group and a fourth conductor group.

SEMICONDUCTOR DEVICE PACKAGES AND RELATED METHODS
20190172724 · 2019-06-06 ·

Semiconductor device packages may include a support structure having electrical connections therein. Semiconductor device modules may be located on a surface of the support structure. A molding material may at least partially surround each semiconductor module on the surface of the support structure. A thermal management device may be operatively connected to the semiconductor device modules on a side of the semiconductor device modules opposite the support structure. At least some of the semiconductor device modules may include a stack of semiconductor dice, at least two semiconductor dice in the stack being secured to one another by diffusion of electrically conductive material of electrically conductive elements into one another.

SEMICONDUCTOR DEVICE PACKAGES AND RELATED METHODS
20190172724 · 2019-06-06 ·

Semiconductor device packages may include a support structure having electrical connections therein. Semiconductor device modules may be located on a surface of the support structure. A molding material may at least partially surround each semiconductor module on the surface of the support structure. A thermal management device may be operatively connected to the semiconductor device modules on a side of the semiconductor device modules opposite the support structure. At least some of the semiconductor device modules may include a stack of semiconductor dice, at least two semiconductor dice in the stack being secured to one another by diffusion of electrically conductive material of electrically conductive elements into one another.

Solderable contact regions
10153384 · 2018-12-11 · ·

A contact region for a semiconductor substrate is disclosed. Embodiments can include forming a seed metal layer having an exposed solder pad region on the semiconductor substrate and forming a first metal layer on the seed metal layer. In an embodiment, a solderable material, such as silver, can be formed on the exposed solder pad region prior to forming the first metal layer. Embodiments can include forming a solderable material on the exposed solder pad region after forming the first metal layer. Embodiments can also include forming a plating contact region on the seed metal layer, where the plating contact region allows for electrical conduction during a plating process.