Patent classifications
H01L2224/05617
METHOD FOR TRANSIENT LIQUID-PHASE BONDING BETWEEN METAL MATERIALS USING A MAGNETIC FORCE
Disclosed is a method for transient liquid-phase bonding between metal materials using a magnetic force. In particular, in the method, a magnetic force is applied to a transient liquid-phase bonding process, thereby shortening a transient liquid-phase bonding time between the metal materials, and obtaining high bonding strength. To this end, an attractive magnetic force is applied to a ferromagnetic base while a repulsive magnetic force is applied to a diamagnetic base, thereby to accelerate diffusion. This may reduce a bonding time during a transient liquid-phase bonding process between two bases and suppress formation of Kirkendall voids and voids and suppress a layered structure of an intermetallic compound, thereby to increase a bonding strength.
Warpage-compensated bonded structure including a support chip and a three-dimensional memory chip
A first semiconductor die and a second semiconductor die can be bonded in a manner that enhances alignment of bonding pads. Non-uniform deformation of a first wafer including first semiconductor dies can be compensated for by forming a patterned stress-generating film on a backside of the first wafer. Metallic bump portions can be formed on concave surfaces of metallic bonding pads by a selective metal deposition process to reduce gaps between pairs of bonded metallic bonding pads. Pad-to-pad pitch can be adjusted on a semiconductor die to match the pad-to-pad pitch of another semiconductor die employing a tilt-shift operation in a lithographic exposure tool. A chuck configured to provide non-uniform displacement across a wafer can be employed to hold a wafer in a contoured shape for bonding with another wafer in a matching contoured position. Independently height-controlled pins can be employed to hold a wafer in a non-planar configuration.
Warpage-compensated bonded structure including a support chip and a three-dimensional memory chip
A first semiconductor die and a second semiconductor die can be bonded in a manner that enhances alignment of bonding pads. Non-uniform deformation of a first wafer including first semiconductor dies can be compensated for by forming a patterned stress-generating film on a backside of the first wafer. Metallic bump portions can be formed on concave surfaces of metallic bonding pads by a selective metal deposition process to reduce gaps between pairs of bonded metallic bonding pads. Pad-to-pad pitch can be adjusted on a semiconductor die to match the pad-to-pad pitch of another semiconductor die employing a tilt-shift operation in a lithographic exposure tool. A chuck configured to provide non-uniform displacement across a wafer can be employed to hold a wafer in a contoured shape for bonding with another wafer in a matching contoured position. Independently height-controlled pins can be employed to hold a wafer in a non-planar configuration.
Metal line design for hybrid-bonding application
A hybrid-bonding structure and a method for forming a hybrid-bonding structure are provided. The hybrid-bonding structure includes a first semiconductor substrate, a first conductive line and a first dielectric dummy pattern. The first conductive line is formed over the first semiconductor substrate. A surface of the first conductive line is configured to hybrid-bond with a second conductive line over a second semiconductor substrate. The first dielectric dummy pattern is formed over the first semiconductor substrate and embedded in the first conductive line.
Metal line design for hybrid-bonding application
A hybrid-bonding structure and a method for forming a hybrid-bonding structure are provided. The hybrid-bonding structure includes a first semiconductor substrate, a first conductive line and a first dielectric dummy pattern. The first conductive line is formed over the first semiconductor substrate. A surface of the first conductive line is configured to hybrid-bond with a second conductive line over a second semiconductor substrate. The first dielectric dummy pattern is formed over the first semiconductor substrate and embedded in the first conductive line.
LIGHT-EMITTING DEVICE PACKAGE AND LIGHTING MODULE
The light-emitting device package disclosed in the embodiment includes first and second frames; a body supporting the first and second frames; and a light emitting device on the second frame, and the body may include a lower surface, a first side, and a second side facing the first side. The first frame includes a first recess that is concave in a second side direction from a first side portion adjacent to the first side, and the second frame includes a second recess that is concave in a first side direction from a second side portion adjacent to the second side. The first side portion of the first frame includes plurality of protrusions exposed to the first side of the body, the first recess is disposed between the protrusions of the first side portion, the second side portion of the second frame includes plurality of protrusions exposed to the second side of the body, and the second recess is disposed between the protrusions of the second side portion. A first length in the second direction of the first and second recesses is longer than a width in the first direction, and the first length may be larger than the second length in the second direction, which is an interval between the protrusions disposed in each of the first and second frames.
LIGHT-EMITTING DEVICE PACKAGE AND LIGHTING MODULE
The light-emitting device package disclosed in the embodiment includes first and second frames; a body supporting the first and second frames; and a light emitting device on the second frame, and the body may include a lower surface, a first side, and a second side facing the first side. The first frame includes a first recess that is concave in a second side direction from a first side portion adjacent to the first side, and the second frame includes a second recess that is concave in a first side direction from a second side portion adjacent to the second side. The first side portion of the first frame includes plurality of protrusions exposed to the first side of the body, the first recess is disposed between the protrusions of the first side portion, the second side portion of the second frame includes plurality of protrusions exposed to the second side of the body, and the second recess is disposed between the protrusions of the second side portion. A first length in the second direction of the first and second recesses is longer than a width in the first direction, and the first length may be larger than the second length in the second direction, which is an interval between the protrusions disposed in each of the first and second frames.
WARPAGE-COMPENSATED BONDED STRUCTURE INCLUDING A SUPPORT CHIP AND A THREE-DIMENSIONAL MEMORY CHIP
A first semiconductor die and a second semiconductor die can be bonded in a manner that enhances alignment of bonding pads. Non-uniform deformation of a first wafer including first semiconductor dies can be compensated for by forming a patterned stress-generating film on a backside of the first wafer. Metallic bump portions can be formed on concave surfaces of metallic bonding pads by a selective metal deposition process to reduce gaps between pairs of bonded metallic bonding pads. Pad-to-pad pitch can be adjusted on a semiconductor die to match the pad-to-pad pitch of another semiconductor die employing a tilt-shift operation in a lithographic exposure tool. A chuck configured to provide non-uniform displacement across a wafer can be employed to hold a wafer in a contoured shape for bonding with another wafer in a matching contoured position. Independently height-controlled pins can be employed to hold a wafer in a non-planar configuration.
WARPAGE-COMPENSATED BONDED STRUCTURE INCLUDING A SUPPORT CHIP AND A THREE-DIMENSIONAL MEMORY CHIP
A first semiconductor die and a second semiconductor die can be bonded in a manner that enhances alignment of bonding pads. Non-uniform deformation of a first wafer including first semiconductor dies can be compensated for by forming a patterned stress-generating film on a backside of the first wafer. Metallic bump portions can be formed on concave surfaces of metallic bonding pads by a selective metal deposition process to reduce gaps between pairs of bonded metallic bonding pads. Pad-to-pad pitch can be adjusted on a semiconductor die to match the pad-to-pad pitch of another semiconductor die employing a tilt-shift operation in a lithographic exposure tool. A chuck configured to provide non-uniform displacement across a wafer can be employed to hold a wafer in a contoured shape for bonding with another wafer in a matching contoured position. Independently height-controlled pins can be employed to hold a wafer in a non-planar configuration.
Optical package structure, optical module, and method for manufacturing the same
An optical package structure includes a substrate having a first surface, an interposer bonded to the first surface through a bonding layer, the interposer having a first area from a top view perspective, and an optical device on the interposer, having a second area from the top view perspective, the first area being greater than the second area. A method for manufacturing the optical package structure is also provided.