A power module (2) including a plurality of rectangular electrical power components (4, 4′) arranged on a substrate (6). The sides of at least a subset of the rectangular electrical power components (4, 4′) are not orthogonal to a line (12, 12′) that passes through the geometric centre (C) of the rectangular electrical power components (4, 4′) of the subset and extends orthogonal to a side (L, M) of the substrate (6).

A semiconductor device includes a substrate, a semiconductor chip, a plurality of bonding pads on a surface of the semiconductor chip, a plurality of probe pads on a surface of the semiconductor chip, a plurality of connection pads on a surface of the substrate, and a plurality of bonding wires that electrically connect the bonding pads and the connection pads. The plurality of bonding pads include a first bonding pad and a second bonding pad, the plurality of probe pads include a first probe pad and a second probe pad, and a part of the first probe pad is disposed between the second bonding pad and the second probe pad.

A semiconductor device with improved reliability is provided. The semiconductor device is characterized by its embodiments in that sloped portions are formed on connection parts between a pad and a lead-out wiring portion, respectively. This feature suppresses crack formation in a coating area where a part of the pad is covered with a surface protective film.

Provided is an interposer for a semiconductor package, the interposer including an interposer substrate comprising a first main surface and a second main surface opposite to the first main surface, a first through-electrode structure and a second through-electrode structure each passing through the interposer substrate and protruding from the first main surface, a connection terminal structure contacting both the first through-electrode structure and the second through-electrode structure, and a photosensitive polymer layer arranged between the connection terminal structure and the interposer substrate, and between the first through-electrode structure and the second through-electrode structure.

An electronic apparatus comprises a semiconductor device and a mounting substrate. The semiconductor device includes a semiconductor chip and a wiring circuit board. The chip includes a circuit blocks and first electrode pads. The wiring circuit board includes a first surface and a second surface. The first surface includes second electrode pads wirings. The second surface includes ball electrodes. A first wiring supplies a ground potential to a first circuit block. A second wiring supplies a ground potential to a second circuit block. The second surface includes a first extension pad and a second extension pad. The first extension pad and the second extension pad are disposed at positions at which they are connected to each other on the second surface side through a single ball electrode.

Microelectronic assemblies, related devices and methods, are disclosed herein. In some embodiments, a microelectronic assembly may include a first microelectronic component having a first direct bonding region, wherein the first direct bonding region includes first metal contacts and a first dielectric material between adjacent ones of the first metal contacts; a second microelectronic component having a second direct bonding region, wherein the second direct bonding region includes second metal contacts and a second dielectric material between adjacent ones of the second metal contacts, wherein the first microelectronic component is coupled to the second microelectronic component by interconnects, and wherein the interconnects include individual first metal contacts coupled to respective individual second metal contacts; and a void between an individual first metal contact that is not coupled to a respective individual second metal contact, wherein the void is in the first direct bonding region.

A chip includes: a chip substrate including a central area and an edge area surrounding the central area; and a plurality of pads arranged on the chip substrate, the plurality of pads including a first pad and a second pad, wherein the first pad is arranged in the edge area and includes at least one straight side adjacent to a side of the chip substrate, and the second pad is arranged in the central area.

A first semiconductor device includes a first substrate including a first electrode and a second electrode at a first surface side of the first substrate opposite to a light incident surface side of the first substrate; and a second substrate including a photodiode, a transfer transistor, and a third electrode and a fourth electrode at a first surface side of the second substrate facing the first surface of the first substrate, and a plurality of transistors.

A bonded assembly includes a first semiconductor die that includes first metallic bonding structures embedded within a first bonding-level dielectric layer, and a second semiconductor die that includes second metallic bonding structures embedded within a second bonding-level dielectric layer and bonded to the first metallic bonding structures by metal-to-metal bonding. One of the first metallic bonding structures a pad portion, and a via portion located between the pad portion and the first semiconductor device, the via portion having second tapered sidewalls.

A package that includes a substrate comprising a cavity, a first integrated device coupled to the substrate through a first plurality of pillar interconnects and a first plurality of solder interconnects, a second integrated device coupled to the substrate through a second plurality of pillar interconnects and a second plurality of solder interconnects, and a plurality of wire bonds coupled to the first integrated device and the second integrated device, wherein the plurality of wire bonds is located over the cavity of the substrate.