A display panel includes a substrate including a display area and a pad area spaced apart from the display area, and an uneven pad disposed on the substrate in the pad area. The uneven pad includes a first conductive layer, a first organic layer disposed on the first conductive layer and having an upper surface having an uneven shape, and a second conductive layer disposed on the first organic layer.

This application relates to a method of processing microelectronic components comprising measuring parameter values of at least one of a nature and a degree of warpage of singulated microelectronic components in an unconstrained state and sorting the singulated microelectronic components responsive to the measured parameter values of at least one of the nature and degree of warpage. The sorted dice may be used in assemblies to minimize bond line height variances and resulting open circuits between components. Systems for implementing the methods are also disclosed.

The present invention relates to the field of photonic integrated circuits and provides a semiconductor device and a manufacturing method thereof. The semiconductor device includes an EIC chip and a PIC chip arranged on a substrate, the EIC chip is located between the PIC chip and the substrate. In embodiments, at least one EIC chip is disposed on a surface of a single PIC chip facing the substrate, and the EIC chip is mounted on the substrate through a connection structure. Therefore, the wiring of the PIC chip in the semiconductor device of the present invention is optimized such that the voltage drop due to long wiring distance can be suppressed, and the package structure of the semiconductor device is also optimized.

A semiconductor package is provided in which a first adhesive film includes a first extension portion extending relative to a side surface of a first semiconductor chip in a second direction, perpendicular to the first direction, the first extension portion has an upper surface including a first recess concave toward a base chip, each of the plurality of second adhesive films includes a second extension portion extending relative to side surfaces of the plurality of second semiconductor chips in the second direction, and the second extension portion has an upper surface including a second recess concave in the first direction and a lower surface including a protrusion in the first recess or the second recess.

An array substrate includes a base substrate, a driving circuit layer, and a functional device layer which are sequentially stacked; the driving circuit layer is provided with first driving circuits, and each first driving circuit at least comprises a driving transistor; and the driving circuit layer comprises a first gate layer, a first gate insulation layer, a semiconductor layer, a second gate insulation layer, a second gate layer, an interlayer dielectric layer, and a source-drain metal layer which are sequentially stacked on one side of the base substrate.

A method includes forming a set of through-vias in a substrate, the set of through-vias partially penetrating a thickness of the substrate. First connectors are formed over the set of through-vias on a first side of the substrate. The first side of the substrate is attached to a carrier. The substrate is thinned from the second side to expose the set of through-vias. Second connectors are formed over the set of through-vias on the second side of the substrate. A device die is bonded to the second connectors. The substrate is singulated into multiple packages.

A device is provided. The device includes one or more of a singular die, one of another die, a printed circuit board, and a substrate, and one or more solder balls. The singular die includes one or more reconditioned die pads, which include die pads of the singular die with a plurality of metallic layers applied. The other die, printed circuit board, and the substrate include one or more bond pads. The one or more solder balls are between the one or more reconditioned die pads and the one or more bond pads.

A bonding apparatus includes an ultrasonic oscillator which generates ultrasonic vibration, a stage disposed under the ultrasonic oscillator, and an embossed sheet disposed between the ultrasonic oscillator and the stage. The embossed sheet includes a body and a plurality of protrusions protruding downward from a lower surface of the body which faces the stage.

A semiconductor package includes a first semiconductor chip on a base chip, a second semiconductor chip on the first semiconductor chip in a first direction, each of the first and second semiconductor chips including a TSV and being electrically connected to each other via the TSV, dam structures on the base chip and surrounding a periphery of the first semiconductor chip, a first adhesive film between the base chip and the first semiconductor chip, a portion of the first adhesive film filling a space between the first semiconductor chip and the dam structures, a second adhesive film between the first semiconductor chip and the second semiconductor chip, a portion of the second adhesive film overlapping the dam structures in the first direction, and an encapsulant encapsulating a portion of each of the dam structures, the first semiconductor chip, and the second semiconductor chip.

A semiconductor package including a base chip; a semiconductor chip having a lower surface on which connection pads are disposed, the semiconductor chip being mounted on an upper surface of the base chip; a plurality of bumps on the connection pads and electrically connecting the base chip to the semiconductor chip; an adhesive film between the base chip and the semiconductor chip and fixing the semiconductor chip to the base chip; and an encapsulant on the base chip and encapsulating the semiconductor chip, wherein the semiconductor chip includes a central portion spaced apart from the upper surface of the base chip by a first distance, and an edge portion spaced apart from the upper surface of the base chip by a second distance, the edge portion being outside of the central portion, and a ratio of the second distance to the first distance is about 0.8 to about 1.0.