A semiconductor package includes: a semiconductor integrated circuit; an interlayer film disposed on the semiconductor integrated circuit; a rewiring layer disposed on the interlayer film; post electrodes disposed on the rewiring layer; a protective layer which is disposed on the interlayer film and covers the rewiring layer and the post electrodes; and a plurality of balls which is respectively disposed on the post electrodes and is connected to the rewiring layer, wherein balls existing on a wiring path of internal wirings connected to inner lands of a plurality of lands, which is arranged on a printed circuit board substrate to face the plurality of balls and is connectable to the plurality of balls, are non-connected to the rewiring layer.

A semiconductor package includes: a semiconductor integrated circuit; an interlayer film disposed on the semiconductor integrated circuit; a rewiring layer disposed on the interlayer film; post electrodes disposed on the rewiring layer; a protective layer which is disposed on the interlayer film and covers the rewiring layer and the post electrodes; and a plurality of balls which is respectively disposed on the post electrodes and is connected to the rewiring layer, wherein balls existing on a wiring path of internal wirings connected to inner lands of a plurality of lands, which is arranged on a printed circuit board substrate to face the plurality of balls and is connectable to the plurality of balls, are non-connected to the rewiring layer.

An electronic device includes: a first circuit board; a second circuit board located above a first region of the first circuit board; a first semiconductor element located above a second region of the first circuit board, which is different from the first region, and above a third region of the second circuit board; a first connection interposed between the first semiconductor element and the second region so as to electrically interconnect the first semiconductor element and the first circuit board; and a second connection interposed between the first semiconductor element and the third region so as to electrically interconnect the first semiconductor element and the second circuit board.

An electronic device includes: a first circuit board; a second circuit board located above a first region of the first circuit board; a first semiconductor element located above a second region of the first circuit board, which is different from the first region, and above a third region of the second circuit board; a first connection interposed between the first semiconductor element and the second region so as to electrically interconnect the first semiconductor element and the first circuit board; and a second connection interposed between the first semiconductor element and the third region so as to electrically interconnect the first semiconductor element and the second circuit board.

A method for manufacturing a semiconductor device is provided. The method includes providing a substrate having a lower surface and an upper surface opposite to the lower surface; forming an opening extending between the upper surface and the lower surface of the substrate; attaching a first electronic component to the upper surface of the substrate, wherein an active surface of the first electronic component faces the upper surface of the substrate; attaching a second electronic component to the first electronic component, wherein an active surface of the second electronic component faces the upper surface of the substrate; and forming a bonding wire on the substrate, wherein the bonding wire passes through the opening of the substrate and electrically connects the substrate and one of the first electronic component or the second electronic component.

In examples, a semiconductor package comprises a substrate having multiple conductive layers coupled to bond pads at a surface of the substrate. The package includes a semiconductor die including a device side facing the substrate, the device side having first and second circuitry regions, the first circuitry region having greater sensitivity to at least one of mechanical or thermal stress than the second circuitry region. The package also includes conductive members coupled to the bond pads of the substrate, in direct physical contact with the second circuitry region, and not in direct physical contact with the first circuitry region. The package further comprises a first support member coupled to the device side of the semiconductor die and extending toward the substrate and not touching the substrate or a second support member coupled to the substrate. The package also includes a ring on the substrate and encircling the bond pads and a glob top member covering the semiconductor die and a portion of the substrate circumscribed by the ring. The package also includes a mold compound covering the glob top member and the substrate.