A semiconductor device includes an insulation substrate including a circuit pattern, semiconductor chips mounted on the circuit pattern, a wire connecting between the semiconductor chips and between the semiconductor chip and the circuit pattern, and a conductive material serving as a conductor formed integrally with the wire.

A device includes an interposer including an insulative layer between a lower metal layer and a first upper metal layer and a second upper metal layer, a semiconductor transistor die attached to the first upper metal layer and comprising a first lower main face and a second upper main face, with a drain or collector pad on the first main face and electrically connected to the first upper metal layer, a source or emitter electrode pad and a gate electrode pad on the second main face, a leadframe connected to the interposer and comprising a first lead connected with the first upper metal layer, a second lead connected with the source electrode pad, and a third lead connected with the second upper metal layer, and wherein an electrical connector that is connected between the gate electrode pad and the second upper metal layer is orthogonal to a first electrical connector.

Various embodiments may provide a semiconductor package. The semiconductor package may include a first electrical component, a second electrical component, a first heat sink, and a second heat sink bonded to a first package interconnection component and a second package interconnection component. The first package interconnection component and the second package interconnection component may provide lateral and vertical interconnections in the package.

A semiconductor package includes a first die pad, a first semiconductor die mounted on the first die pad, an encapsulant body of electrically insulating material that encapsulates first die pad and the first semiconductor die, a plurality of package leads that each protrude out of a first outer face of the encapsulant body, a connection lug that protrudes out of a second outer face of the encapsulant body, the second outer face being opposite from the first outer face. The first semiconductor die includes first and second voltage blocking terminals. The connection lug is electrically connected to one of the first and second voltage blocking terminals of the first semiconductor die. A first one of the package leads is electrically connected to an opposite one of the first and second voltage blocking terminals of the first semiconductor die that the first connection lug is electrically connected to.

The present invention relates to a semiconductor package in which a metal bridge, which is bent and has elasticity and a non-vertical structure, may protect a semiconductor chip in such a way that push-stress occurring while molding is relieved by being absorbed or dispersed by being diverted, a method of manufacturing the same, and the metal bridge applied to the semiconductor package.

The present disclosure includes: a base plate having a shape of a sheet; a relay plate having a shape of a sheet; a terminal member; and an electronic component joined to one surface of the base plate. The base plate, the relay plate, and the terminal member are electrically conductive members and arranged on a same plane with gaps between the electrically conductive members. The electronic component and one surface of the relay plate are connected to each other by a bonding wire. The one surface of the relay plate and one surface of the terminal member are connected to each other by a bonding wire.

According to an exemplary embodiment, a semiconductor component includes a chip carrier, a semiconductor chip mounted on the chip carrier, and a chip package made of potting compound. The potting compound only partially surrounds the semiconductor chip, such that at least part of an upper side of the semiconductor chip is not covered by the potting compound. The semiconductor component further includes a clip that is mechanically connected to the upper side of the semiconductor chip.

Disclosed are a micro LED group substrate provided with a plurality of micro LEDs, a method of manufacturing the same, a micro LED display panel, and a method of manufacturing the same. More particularly, disclosed are a micro LED group substrate provided with a plurality of micro LEDs, a method of manufacturing the same, a micro LED display panel, and a method of manufacturing the same, wherein the need for a micro LED replacement process is eliminated.

A semiconductor device includes: an insulating layer; a circuit pattern on an upper surface of the insulating layer; a semiconductor element bonded to an upper surface of the circuit pattern through a first bonding material; an insulating component bonded to the upper surface of the circuit pattern through a second bonding material; and a lead electrode connecting the semiconductor element to the insulating component, wherein an upper surface of the semiconductor element is bonded to a lower surface of the lead electrode through a third bonding material, an upper surface of the insulating component is bonded to the lower surface of the lead electrode through a fourth bonding material, and the first bonding material, the second bonding material, the third bonding material, and the fourth bonding material are made of a same material.

In a wiring member, an element connection portion, a plate connection portion, and an upper surface portion are at height positions different from one another. The element connection portion has a through hole, and the plate connection portion has a through hole and a chamfer. The upper surface portion which is not connected to another portion, has projections asymmetrically disposed on both side surfaces thereof. Owing to these features, the type, the orientation, and the front and the back of the wiring member can be easily distinguished. Accordingly, it is possible to prevent incorrect assembling of the wiring member in a semiconductor module.