An electronic power module, including at least one semiconductor component, which is arranged on a support, as well as a cooling element, which is in thermal contact with the semiconductor component, wherein the support includes a semiconductor material and, at the same time, serves as a cooling element.

A semiconductor package comprises a lead frame, a low side metal-oxide-semiconductor field-effect transistor (MOSFET), an E-fuse MOSFET, a high side MOSFET, a metal connection, a gate driver, an E-fuse IC, and a molding encapsulation. A buck converter comprises a smart power stage (SPS) network and an E-fuse solution network. The SPS network comprises a high side switch, a low side switch, and a gate driver. A drain of the low side switch is coupled to a source of the high side switch via a switch node. The gate driver is coupled to a gate of the high side switch and a gate of the low side switch. The E-fuse solution network comprises a sense resistor, an E-fuse switch, an E-fuse integrated circuit (IC), and an SD circuit.

A semiconductor device has a leadframe and a first electrical component disposed over the leadframe. A clip bond is disposed over the first electrical component. The clip bond has a plurality of recesses each having a different depth. A first recess is proximate to a first distal end of the first electrical component, and a second recess is proximate to a second distal end of the first electrical component opposite the first distal end of the first electrical component. A depth of the first recess is different from a depth of the second recess. A third recess is over a surface of the first electrical component. A depth of the third recess is different from the depth of the first recess and the depth of the second recess. A second electrical component is disposed over the leadframe. The clip bond extends over the second electrical component.

The present invention relates to a power semiconductor module including a first heat dissipation substrate, a semiconductor chip, a lead plate, a PCB, and a heat dissipation plate that are packaged within a casing, wherein dualization of a heat dissipation structure is applied to facilitate superior heat dissipation performance compared to a conventional power semiconductor module.

A package includes a package body with a package top side, package footprint side and package sidewalls extending from the package footprint side to the package top side; power semiconductor chips electrically connected in parallel and each having first and second load terminals and being configured to block a blocking voltage and conduct a chip load current between the load terminals; a lead frame structure configured to electrically and mechanically couple the package to a carrier with the package footprint side facing the carrier, the lead frame structure including first outside terminals extending out of the package body for interfacing with the carrier. Each first load terminal is electrically connected, at least by one package body internal connection member, to at least two of the first outside terminals. A horizontally extending conduction layer at the package top side or footprint side is electrically connected with each second load terminal.

A package structure applied to power converters can include: a first die having a first power transistor and a first control and drive circuit; a second die having a second power transistor; a connection device configured to couple the first and second power transistors in series between a high-level pin and a low-level pin of a lead frame of the package structure; and where a common node of the first and second power transistors can be coupled to an output pin of the lead frame through a metal connection structure with a low interconnection resistance.

A power semiconductor device includes: a package and a plurality of power semiconductor chips, each power semiconductor chip including a semiconductor body, a first load terminal, a second load terminal and a control terminal. The device also includes a plurality of outside terminals. The outside terminals include: one or more first outside terminals electrically connected with the first load terminals; one or more second outside terminals each of which is electrically connected with each of the second load terminals; and a plurality of third outside terminals. Each control terminal is electrically connected with at least one individual third outside terminal of the plurality of third outside terminals.

A semiconductor package includes a first die pad, a first semiconductor die mounted on the first die pad, an encapsulant body of electrically insulating material that encapsulates first die pad and the first semiconductor die, a plurality of package leads that each protrude out of a first outer face of the encapsulant body, a connection lug that protrudes out of a second outer face of the encapsulant body, the second outer face being opposite from the first outer face. The first semiconductor die includes first and second voltage blocking terminals. The connection lug is electrically connected to one of the first and second voltage blocking terminals of the first semiconductor die. A first one of the package leads is electrically connected to an opposite one of the first and second voltage blocking terminals of the first semiconductor die that the first connection lug is electrically connected to.

The present disclosure describes a power module having a substrate, first and second pluralities of vertical power devices, and first and second terminal assemblies. The substrate has a top surface with a first trace and a second trace. The first plurality of vertical power devices and the second plurality of vertical power devices are electrically coupled to form part of a power circuit. The first plurality of vertical power devices is electrically and mechanically directly coupled between the first trace and a bottom of a first elongated bar of the first terminal assembly. The second plurality of vertical power devices are electrically and mechanically directly coupled between the second trace and a bottom of a second elongated bar of the second terminal assembly.

A semiconductor device includes a first die pad having a main surface, a second die pad having a second main surface, a first switching element connected to the first main surface, a second switching element connected to the second main surface, a first connecting member connecting the first main surface electrode of the first switching element to the second die pad, an encapsulation resin encapsulating the first switching element, the second switching element, the first die pad, the second die pad, and the first connecting member, and leads projecting out of one of the resin side surfaces of the encapsulation resin.