It is an object of the present invention to provide a semiconductor module in which a bonded portion has high reliability, and that has a small area. A semiconductor module includes a plurality of metal plates extending in a horizontal direction and stacked in a vertical direction, at least one switching element, and at least one circuit element. The at least one switching element is bonded between two of the plurality of metal plates, facing each other in a vertical direction. The at least one circuit element is bonded between two of the plurality of metal plates, facing each other in a vertical direction. Disposed between the plurality of metal plates is an insulating material. At least one of the plurality of metal plates is bonded to the at least one switching element and the at least one circuit element.

A semiconductor chip includes a semiconductor body having a lower side with a lower chip metallization applied thereto. A first contact metallization layer is produced on the lower chip metallization. A second contact metallization layer is produced on a metal surface of a substrate. The semiconductor chip and the substrate are pressed onto one another for a pressing time so that the first and second contact metallization layers bear directly and extensively on one another. During the pressing time, the first contact metallization layer is kept continuously at temperatures which are lower than the melting temperature of the first contact metallization layer. The second contact metallization layer is kept continuously at temperatures which are lower than the melting temperature of the second contact metallization layer during the pressing time. After the pressing together, the first and second contact metallization layers have a total thickness less than 1000 nm.

An embodiment related to a package is disclosed. The package includes a component mounted to a die attach region on a package substrate. A passive component with first and second passive component terminals is vertically attached to the package substrate. An encapsulant is disposed over the package substrate to encapsulate the package. In one embodiment, an external component is stacked above the encapsulant and is electrically coupled to the encapsulated package.

A semiconductor package includes a metal baseplate, a semiconductor die having a reference terminal attached to the baseplate and an RF terminal facing away from the baseplate, and a multilayer circuit board having a first side attached to the baseplate and a second side facing away from the baseplate. The multilayer circuit board includes a plurality of interleaved signal and ground layers. One of the signal layers is at the second side of the multilayer circuit board and electrically connected to the RF terminal of the semiconductor die. One of the ground layers is at the first side of the multilayer circuit board and attached to the metal baseplate. Power distribution structures are formed in the signal layer at the second side of the multilayer circuit board. RF matching structures are formed in a different one of the signal layers than the power distribution structures.

A method for producing a circuit arrangement for an electric machine is provided. The circuit arrangement has at least one power input which is connectable to an electric energy storage device, at least one power semiconductor which is arranged in a power semiconductor module, and at least one power output which is connectable to an excitation coil of the electric machine, wherein the power input is electrically connected to a first power terminal of the power semiconductor module via an intermediate circuit of the circuit arrangement, and the power output is electrically connected to a second power terminal of the power semiconductor module via a control board of the circuit arrangement. A power semiconductor module for a circuit arrangement for an electric machine, and to a corresponding circuit arrangement is also provided.

A voltage-controlled switching device includes a drain/drift structure formed in a semiconductor portion with a lateral cross-sectional area A.sub.Q, a source/emitter terminal, and an emitter channel region between the drain/drift structure and the source/emitter terminal. A resistive path electrically connects the source/emitter terminal and the emitter channel region. The resistive path has an electrical resistance of at least 0.1 m*cm.sup.2/A.sub.Q.

A semiconductor package includes a metal baseplate, a semiconductor die having a reference terminal attached to the baseplate and an RF terminal facing away from the baseplate, and a multilayer circuit board having a first side attached to the baseplate and a second side facing away from the baseplate. The multilayer circuit board includes a plurality of interleaved signal and ground layers. One of the signal layers is at the second side of the multilayer circuit board and electrically connected to the RF terminal of the semiconductor die. One of the ground layers is at the first side of the multilayer circuit board and attached to the metal baseplate. Power distribution structures are formed in the signal layer at the second side of the multilayer circuit board. RF matching structures are formed in a different one of the signal layers than the power distribution structures.