Provided is a semiconductor device stabilizing bond properties between an electrode terminal provided on a case and an internal wiring connected to a semiconductor element. A semiconductor device includes a base part, a semiconductor element, an electrode terminal, an insulating block, and an internal wiring. The semiconductor element is mounted on the base part. The electrode terminal is held by a case surrounding an outer periphery of the semiconductor element. An end portion of the electrode terminal protrudes toward an inner side of the case. The insulating block is provided on the base part between the semiconductor element and the case. In the internal wiring, one end portion is bonded to the end portion of the electrode terminal on the insulating block, and part of a region extending from the one end portion to the other end portion is bonded to the semiconductor element.

In one embodiment, a cascode rectifier structure includes a group III-V semiconductor structure includes a heterostructure disposed on a semiconductor substrate. A first current carrying electrode and a second current carrying electrode are disposed adjacent a major surface of the heterostructure and a control electrode is disposed between the first and second current carrying electrode. A rectifier device is integrated with the group III-V semiconductor structure and is electrically connected to the first current carrying electrode and to a third electrode. The control electrode is further electrically connected to the semiconductor substrate and the second current path is generally perpendicular to a primary current path between the first and second current carrying electrodes.

A method for manufacturing a semiconductor module includes the step of soldering two or more semiconductor elements having substrate materials and heights different from each other to a metal foil disposed at one side of an insulating substrate; connecting a plurality of wiring members, not interconnecting the semiconductor elements, to front face electrodes of the semiconductor elements through solder so that heights from a surface of the insulating substrate to top faces of the wiring members become same level with each other; inspecting a leakage current while applying electricity on each one of semiconductor elements individually through the wiring members; and connecting the top faces of the wiring members with a bus bar.

A power module (PM) includes: an insulating substrate; a semiconductor device disposed on the insulating substrate, the semiconductor device including electrodes on a front surface side and a back surface side thereof; and a graphite plate having an anisotropic thermal conductivity, the graphite plate of which one end is connected to the front surface side of the semiconductor device and the other end is connected to the insulating substrate, wherein heat of the front surface side of the semiconductor device is transferred to the insulating substrate through the graphite plate. There is provide an inexpensive power module capable of reducing a stress and capable of exhibiting cooling performance not inferior to that of the double-sided cooling structures.

A power module (PM) includes: an insulating substrate; a semiconductor device disposed on the insulating substrate, the semiconductor device including electrodes on a front surface side and a back surface side thereof; and a graphite plate having an anisotropic thermal conductivity, the graphite plate of which one end is connected to the front surface side of the semiconductor device and the other end is connected to the insulating substrate, wherein heat of the front surface side of the semiconductor device is transferred to the insulating substrate through the graphite plate. There is provide an inexpensive power module capable of reducing a stress and capable of exhibiting cooling performance not inferior to that of the double-sided cooling structures.

A semiconductor module forming a semiconductor device includes lead frames in which switching elements are mounted on the side of upper surfaces and heat radiation surfaces are formed on the side of lower surfaces, and bus bars disposed on the lead frames and connecting between plural switching elements. The heat radiation surfaces of the lead frames are arranged on one plane and upper surfaces of flat surface portions of the bus bars are arranged on one plane, therefore, a layout property on the heat radiation surfaces or the upper surfaces the flat surface portions is good, which facilitates creation of a heat radiation structure and so on.

In order to provide a feature for processing an image of an object being photographed using photographic data having better quality, an image analyzer 1 is provided with a selection unit 104 and a bandwidth control request unit 105. The selection unit 104 selects a second photographing device associated with a first photographing device from among a plurality of photographing devices. The bandwidth control request unit 105 transmits, to a network control device, a request for change of the transmission data amount transmittable by the second photographing device.

A semiconductor device A1 disclosed includes: a semiconductor element 10 having an element obverse face and element reverse face that face oppositely in a thickness direction z, with an obverse-face electrode 11 (first electrode 111) and a reverse-face electrode 12 respectively formed on the element obverse face and the element reverse face; a conductive member 22A opposing the element reverse face and conductively bonded to the reverse-face electrode 12; a conductive member 22B spaced apart from the conductive member 22A and electrically connected to the obverse-face electrode 11; and a lead member 51 having a lead obverse face 51a facing in the same direction as the element obverse face and connecting the obverse-face electrode 11 and the conductive member 22B. The lead member 51, bonded to the obverse-face electrode 11 via a lead bonding layer 321, includes a protrusion 521 protruding in the thickness direction z from the lead obverse face 51a. The protrusion 521 overlaps with the obverse-face electrode 11 as viewed in the thickness direction z. This configuration suppresses deformation of the connecting member to be pressed during sintering treatment.

A semiconductor device A1 disclosed includes: a semiconductor element 10 having an element obverse face and element reverse face that face oppositely in a thickness direction z, with an obverse-face electrode 11 (first electrode 111) and a reverse-face electrode 12 respectively formed on the element obverse face and the element reverse face; a conductive member 22A opposing the element reverse face and conductively bonded to the reverse-face electrode 12; a conductive member 22B spaced apart from the conductive member 22A and electrically connected to the obverse-face electrode 11; and a lead member 51 having a lead obverse face 51a facing in the same direction as the element obverse face and connecting the obverse-face electrode 11 and the conductive member 22B. The lead member 51, bonded to the obverse-face electrode 11 via a lead bonding layer 321, includes a protrusion 521 protruding in the thickness direction z from the lead obverse face 51a. The protrusion 521 overlaps with the obverse-face electrode 11 as viewed in the thickness direction z. This configuration suppresses deformation of the connecting member to be pressed during sintering treatment.

A combined packaged power semiconductor device includes flipped top source low-side MOSFET electrically connected to top surface of a die paddle, first metal interconnection plate connecting between bottom drain of a high-side MOSFET or top source of a flipped high-side MOSFET to bottom drain of the low-side MOSFET, and second metal interconnection plate stacked on top of the high-side MOSFET chip. The high-side, low-side MOSFET and the IC controller can be packaged three-dimensionally reducing the overall size of semiconductor devices and can maximize the chip's size within a package of the same size and improves the performance of the semiconductor devices. The top source of flipped low-side MOSFET is connected to the top surface of the die paddle and thus is grounded through the exposed bottom surface of die paddle, which simplifies the shape of exposed bottom surface of the die paddle and maximizes the area to facilitate heat dissipation.