H01L2224/40245

Pre-molded lead frames for semiconductor packages

One example of a pre-molded lead frame includes a mold body, a plurality of recesses, and a plurality of first leads. The mold body includes a first main surface and a second main surface opposite to the first main surface. Each recess of the plurality of recesses extends from the first main surface into the mold body. The plurality of first leads are coupled to the mold body and extend from a third surface of the mold body. The third surface extends between the first main surface and the second main surface.

Semiconductor device and semiconductor module using same
11694948 · 2023-07-04 · ·

This semiconductor device includes: a plate-shaped heat dissipation plate; a plurality of switching elements joined to one surface of the heat dissipation plate; a first terminal located apart from the heat dissipation plate, extending in a direction away from the heat dissipation plate, and connected via first conductors to surfaces of the switching elements on a side opposite to the heat dissipation plate side; and a sealing member sealing the switching elements, the heat dissipation plate, and the first terminal. A cutout is provided at an outer periphery of the heat dissipation plate. A part of the first terminal on the heat dissipation plate side overlaps a cut-out area at the cutout as seen in a direction perpendicular to the one surface of the heat dissipation plate. A retracted portion retracted inward is formed at an outer periphery of another surface of the heat dissipation plate.

SEMICONDUCTOR DEVICE AND A METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
20230005823 · 2023-01-05 · ·

According to the present disclosure, a semiconductor device includes a semiconductor chip, a frame, a projection projecting from the frame, a lead in which a projection insertion portion into which the projection is to be inserted is formed, and which directly contacts the frame to electrically connect the semiconductor chip to the frame and a first bonding material configured to bond the projection to the lead.

Package including multiple semiconductor devices

In a general aspect, an apparatus can include an inner package including a first silicon carbide die having a die gate conductor coupled to a common gate conductor, and a second silicon carbide die having a die gate conductor coupled to the common gate conductor. The apparatus can include an outer package including a substrate coupled to the common gate conductor, and a clip coupled to the inner package and coupled to the substrate.

POWER SEMICONDUCTOR PACKAGE
20220416663 · 2022-12-29 ·

Subject matter disclosed herein may relate to semiconductor devices, and may more particularly relate to power semiconductor packages, for example.

SEMICONDUCTOR DEVICE
20220415764 · 2022-12-29 ·

There is provided a technique that includes: a lead having a main surface facing in a thickness direction; a semiconductor element mounted over the main surface; and a sealing resin that is in contact with the main surface and covers the semiconductor element, wherein the lead is formed with a plurality of grooves that are recessed from the main surface and are located apart from each other, and wherein the plurality of grooves are located away from a peripheral edge of the main surface.

Compact low inductance chip-on-chip power card

Methods, systems, and apparatuses for a power card for use in a vehicle. The power card includes an N lead frame, a P lead frame, and an O lead frame each having a body portion and a terminal portion. The O lead frame is located between the N lead frame and the P lead frame. The power card includes a first power device located between the N lead frame and the O lead frame, with a first side coupled to the body portion of the N lead frame and a second side coupled to the body portion of the O lead frame. The power card includes a second power device located between the O lead frame and the P lead frame, with a first side coupled to the body portion of the O lead frame and a second side coupled to the body portion of the P lead frame.

Compact low inductance chip-on-chip power card

Methods, systems, and apparatuses for a power card for use in a vehicle. The power card includes an N lead frame, a P lead frame, and an O lead frame each having a body portion and a terminal portion. The O lead frame is located between the N lead frame and the P lead frame. The power card includes a first power device located between the N lead frame and the O lead frame, with a first side coupled to the body portion of the N lead frame and a second side coupled to the body portion of the O lead frame. The power card includes a second power device located between the O lead frame and the P lead frame, with a first side coupled to the body portion of the O lead frame and a second side coupled to the body portion of the P lead frame.

CLIP STRUCTURE FOR SEMICONDUCTOR PACKAGE AND SEMICONDUCTOR PACKAGE INCLUDING THE SAME
20220399300 · 2022-12-15 · ·

Provided is a clip structure for a semiconductor package comprising: a first bonding unit bonded to a terminal part of an upper surface or a lower surface of a semiconductor device by using a conductive adhesive interposed therebetween, a main connecting unit which is extended and bent from the first bonding unit, a second bonding unit having an upper surface higher than the upper surface of the first bonding unit, an elastic unit elastically connected between the main connecting unit and one end of the second bonding unit, and a supporting unit bent and extended from the other end of the second bonding unit toward the main connecting unit, wherein the supporting unit is formed to incline at an angle of 1° through 179° from an extended surface of the main connecting unit and has an elastic structure so that push-stress applying to the semiconductor device while molding may be dispersed.

SEMICONDUCTOR DEVICE
20220392865 · 2022-12-08 ·

In order to reduce on-resistance in a semiconductor device to be used for high current applications, the semiconductor device includes a source terminal lead located between a gate terminal lead and a Kelvin terminal lead in plan view and electrically connected with a source terminal via a plurality of wires.