An intelligent power module (IPM) has a first, second, third and fourth die paddles, a first, second, third, fourth, fifth and sixth metal-oxide-semiconductor field-effect transistors (MOSFETs), a tie bar, a metal slug, a plurality of spacers, a plurality of leads and a molding encapsulation. The molding encapsulation encloses the first, second, third and fourth die paddles, the first, second, third, fourth, fifth and sixth MOSFETs, the tie bar and the plurality of spacers. A bottom surface of the metal slug is exposed from the molding encapsulation. A process for fabricating the IPM comprises preparing the first, second, third and fourth die paddles, the first, second, third, fourth, fifth and sixth MOSFETs, the tie bar, the plurality of leads, the metal slug and the plurality of spacers and applying a molding process to form the molding encapsulation.

Packaged semiconductor devices and methods of packaging semiconductor devices are disclosed. In some embodiments, a packaged semiconductor device includes an integrated circuit die, a molding compound disposed around the integrated circuit die, and an interconnect structure disposed over the integrated circuit die and the molding compound. The molding compound is thicker than the integrated circuit die.

A semiconductor module includes: a semiconductor chip; a package sealing the semiconductor chip; and a plurality of terminals connected to the semiconductor chip and protruding from the package, wherein the plurality of terminals includes a plurality of first terminals arranged side by side at a first pitch, and a plurality of second terminals arranged side by side at a second pitch, each terminal has a base portion, a tip portion narrower than the base portion, and a connection portion connecting the base portion and the tip portion, the connection portions of the plurality of first terminals are right-angled, and the connection portions of the plurality of second terminals are arc-shaped.

A semiconductor module includes: a semiconductor chip; a package sealing the semiconductor chip; and a plurality of terminals connected to the semiconductor chip and protruding from the package, wherein the plurality of terminals includes a plurality of first terminals arranged side by side at a first pitch, and a plurality of second terminals arranged side by side at a second pitch, each terminal has a base portion, a tip portion narrower than the base portion, and a connection portion connecting the base portion and the tip portion, the connection portions of the plurality of first terminals are right-angled, and the connection portions of the plurality of second terminals are arc-shaped.

A semiconductor chip includes a substrate including a circuit area having a rectangular shape and a peripheral area surrounding the circuit area, a key area being overlapping a part of the circuit area and a part of the peripheral area, a plurality of drive circuit cells in the circuit area, and a conductive reference line on the peripheral area and extending in a first direction parallel to a first edge among four edges of the rectangular shape of the circuit area.

In one example, a device having integrated package interference isolation includes a ground pad, an integrated circuit device die secured to the ground pad, a substrate secured to the ground pad, at least one a high-frequency, high-power semiconductor device secured to a top mounting surface of the substrate. For electromagnetic isolation, the integrated circuit device die includes a top metal, and the substrate includes a metal via electrically coupled to a metal trace that extends on the top mounting surface of the substrate. The device package also includes a number of ground pad bonding wires that electrically couple the redistribution layer of the integrated circuit device die and the metal trace to the ground pad. The redistribution layer of the integrated circuit device die and the metal trace and via of the substrate help to shield electromagnetic radiation between components in the device package.

An inverter-control element operates with a power-supply potential supplied to an inverter-control-system power-supply terminal to output a signal for controlling an inverter switching element. A brake control element operates with a power-supply potential supplied to a brake-control-system power-supply terminal to output a signal for controlling a brake switching element. A first metal component includes a plurality of protrusions protruding from a sealing resin, is supported by the sealing resin with a portion embedded in the sealing resin, and is electrically connected to each of the inverter-control-system power-supply terminal and the brake-control-system power-supply terminal.

An inverter-control element operates with a power-supply potential supplied to an inverter-control-system power-supply terminal to output a signal for controlling an inverter switching element. A brake control element operates with a power-supply potential supplied to a brake-control-system power-supply terminal to output a signal for controlling a brake switching element. A first metal component includes a plurality of protrusions protruding from a sealing resin, is supported by the sealing resin with a portion embedded in the sealing resin, and is electrically connected to each of the inverter-control-system power-supply terminal and the brake-control-system power-supply terminal.

In one example, a device having integrated package interference isolation includes a ground pad, an integrated circuit device die secured to the ground pad, a substrate secured to the ground pad, at least one a high-frequency, high-power semiconductor device secured to a top mounting surface of the substrate. For electromagnetic isolation, the integrated circuit device die includes a top metal, and the substrate includes a metal via electrically coupled to a metal trace that extends on the top mounting surface of the substrate. The device package also includes a number of ground pad bonding wires that electrically couple the redistribution layer of the integrated circuit device die and the metal trace to the ground pad. The redistribution layer of the integrated circuit device die and the metal trace and via of the substrate help to shield electromagnetic radiation between components in the device package.

A semiconductor module includes: a semiconductor chip; a package sealing the semiconductor chip; and a plurality of terminals connected to the semiconductor chip and protruding from the package, wherein the plurality of terminals includes a plurality of first terminals arranged side by side at a first pitch, and a plurality of second terminals arranged side by side at a second pitch, each terminal has a base portion, a tip portion narrower than the base portion, and a connection portion connecting the base portion and the tip portion, the connection portions of the plurality of first terminals are right-angled, and the connection portions of the plurality of second terminals are arc-shaped.