A semiconductor device includes an inverter circuit having a first switching element and a second switching element, a first control circuit, a second control circuit, and a limiting unit. The first switching element is supplied with a power supply voltage. The second switching element includes a first terminal connected to the first switching element, a second terminal connected to ground, and a control terminal. The first control circuit controls the first switching element. The second control circuit controls the second switching element. The limiting unit reduces fluctuation in voltage between the second terminal and the control terminal based on voltage fluctuation at the second terminal of the second switching element.

A semiconductor device includes an inverter circuit having a first switching element and a second switching element, a first control circuit, a second control circuit, and a limiting unit. The first switching element is supplied with a power supply voltage. The second switching element includes a first terminal connected to the first switching element, a second terminal connected to ground, and a control terminal. The first control circuit controls the first switching element. The second control circuit controls the second switching element. The limiting unit reduces fluctuation in voltage between the second terminal and the control terminal based on voltage fluctuation at the second terminal of the second switching element.

There is provided a power semiconductor module with multiple semiconductor chips arranged in parallel on an insulated substrate, allowing for high density mounting of semiconductor chips and highly reliable with less difference in operating characteristics from one semiconductor chip to another. The above module includes an insulated substrate; a first conductive pattern laid out on the insulated substrate; multiple power semiconductor chips arranged on the first conductive pattern; a first wiring formed to bridge and directly connecting respective gate electrodes of the power semiconductor chips; and a second wiring formed to bridge and directly connecting respective source electrodes of the power semiconductor chips, wherein the first wiring is placed alongside of the second wiring and may be angled within 30 degrees with respect to the second wiring.

A semiconductor device A1 includes a substrate 3, a conductive section 5 formed on the substrate 3 and including a conductive material, a lead 1A located on the substrate 3, a semiconductor chip 4A located on the lead 1A, a control chip 4G located on the substrate 3 and electrically connected to the conductive section 5 and the semiconductor chip 4A for controlling an operation of the semiconductor chip 4A, and a resin 7 covering the semiconductor chip 4A, the control chip 4G, at least a part of the substrate 3 and a part of the lead 1A. This configuration contributes to achieving a higher level of integration of the semiconductor device.

A semiconductor device A1 includes a substrate 3, a conductive section 5 formed on the substrate 3 and including a conductive material, a lead 1A located on the substrate 3, a semiconductor chip 4A located on the lead 1A, a control chip 4G located on the substrate 3 and electrically connected to the conductive section 5 and the semiconductor chip 4A for controlling an operation of the semiconductor chip 4A, and a resin 7 covering the semiconductor chip 4A, the control chip 4G, at least a part of the substrate 3 and a part of the lead 1A. This configuration contributes to achieving a higher level of integration of the semiconductor device.

The power converter A1 includes a semiconductor device B1, and a substrate H on which the semiconductor device B1 is mounted, where the semiconductor device B1 includes a control chip constituting a primary control circuit, a semiconductor chip constituting a secondary power circuit, and a transmission circuit for electrically insulating the primary control circuit and the secondary power circuit and for signal transmission between the primary control circuit and the secondary power circuit. The substrate H has a conductive portion K. The power converter A1 includes a connecting terminal T1 disposed on the substrate H and electrically connected to the conductive portion K. The power converter A1 includes a conductive path D1 that is at least partially formed by the conductive portion K of the substrate H, and that electrically connects the primary control circuit and the connecting terminal T1. Such a configuration contributes to downsizing the power converter A1.

The power converter A1 includes a semiconductor device B1, and a substrate H on which the semiconductor device B1 is mounted, where the semiconductor device B1 includes a control chip constituting a primary control circuit, a semiconductor chip constituting a secondary power circuit, and a transmission circuit for electrically insulating the primary control circuit and the secondary power circuit and for signal transmission between the primary control circuit and the secondary power circuit. The substrate H has a conductive portion K. The power converter A1 includes a connecting terminal T1 disposed on the substrate H and electrically connected to the conductive portion K. The power converter A1 includes a conductive path D1 that is at least partially formed by the conductive portion K of the substrate H, and that electrically connects the primary control circuit and the connecting terminal T1. Such a configuration contributes to downsizing the power converter A1.

A method for manufacturing a semiconductor device includes (i) a step of preparing a first semiconductor chip having a first electrode pad thereon and a second semiconductor chip having a second electrode pad thereon and larger in thickness than the first semiconductor chip, the second electrode pad being larger in size than the first electrode pad, (ii) a step of mounting the first semiconductor chip and the second semiconductor chip on the same planarized surface of a substrate having a uniform thickness, (iii) a step of bonding a ball formed by heating and melting a bonding wire to the second electrode pad, (iv) a step of first-bonding the bonding wire to the first electrode pad, and (v) a step of second-bonding the bonding wire to the ball.

Packaged transistor devices are provided that include a transistor on a base of the packaged transistor device, the transistor comprising a control terminal and an output terminal, a first bond wire electrically coupled between an input lead and the control terminal of the transistor, a second bond wire electrically coupled between an output lead and the output terminal of the transistor, and an isolation material that is and physically between the first bond wire and the second bond wire, wherein the isolation material is configured to reduce a coupling between the first bond wire and the second bond wire.

An electronic circuit having a first terminal and a second terminal. The electronic circuit includes a first diode having a PN junction where a forward voltage is a first voltage, a second diode having a Schottky junction where the forward voltage is a second voltage that is smaller than the first voltage, a first wiring member coupling the first terminal to the second terminal via the first diode, and a second wiring member coupling the first terminal to the second terminal via the second diode. The second wiring member has an inductance larger than an inductance of the first wiring member.