A semiconductor unit includes a plurality of semiconductor chips, and an insulated circuit board including an insulating plate having, in a plan view of the semiconductor unit, a rectangular shape surrounded by first and second sides opposite to each other and third and fourth sides perpendicular to the first and second sides and opposite to each other, an output circuit pattern and an input circuit pattern on a front surface of the insulating plate. The output and input circuit patterns each extend from the third side to the fourth side, and disposed in this order side by side in a main current direction that is a direction from the first side toward the second side. The plurality of semiconductor chips are bonded to the input circuit pattern at an area extending from the third side to the fourth side and including a center of the third and fourth sides.

A resin enclosure includes: an inner wall portion from a wall surface defining the space to a side surface of the lead terminal close to the space; and a covering portion that covers at least a part of a top surface of a first portion of the lead terminal.

A semiconductor module including: a plurality of first semiconductor chips; a resin case provided surrounding an accommodation space for accommodating the plurality of first semiconductor chips; a first gate terminal connected to a gate pad of the plurality of first semiconductor chips; a plurality of first main gate wirings provided in the accommodation space, each of which is connected to the gate pad of the plurality of first semiconductor chips; and a first adjusting gate wiring arranged between at least one of the plurality of first main gate wirings and the first gate terminal, and configured to adjust a difference in wiring lengths between the plurality of first semiconductor chips and the first gate terminal is provided.

A method of forming a semiconductor device includes providing a power electronics carrier including a structured metallization layer disposed on an electrically insulating substrate, mounting one or more semiconductor dies on a portion of the structured metallization layer, forming an encapsulant body of electrically insulating material that covers the power electronics carrier and encapsulates the one or more semiconductor dies, securing a press-fit connector to the power electronics carrier with a base portion of the press-fit connector being disposed within an opening in the encapsulant body and with an interfacing end of the press-fit connector being electrically accessible from outside the encapsulant body.

A semiconductor device includes a first semiconductor chip including a plurality of first control electrodes, each of which is disposed at a respective one of corner portions on a first front surface thereof, a first output electrode disposed on the first front surface, and a first input electrode disposed on a first rear surface thereof, a second semiconductor chip including a plurality of second control electrodes, each of which is disposed at a respective one of corner portions on a second front surface thereof, a second output electrode disposed on the second front surface, and a second input electrode disposed on a second rear surface thereof, the second semiconductor chip being disposed adjacent to the first semiconductor chip, and a first connection wire which connects one of the first control electrodes and one of the second control electrodes.

A semiconductor device includes a semiconductor chip, an insulated circuit substrate including an insulating board and a circuit pattern on the insulating board electrically connected to the semiconductor chip, and a wiring member having a leg portion bonded to the circuit pattern. The leg portion includes a vertical portion, a first divided portion, and a second divided portion. The vertical portion extends in a vertical direction orthogonal to a plane of the circuit pattern, and has a split end provided at a side of the vertical portion at which the circuit pattern is disposed. The first divided portion extends from the split end in a first direction parallel to the plane of the circuit pattern and is bonded to the circuit pattern. The second divided portion extends from the split end in a second direction opposite the first direction and is bonded to the circuit pattern.

This semiconductor device includes: a plate-shaped heat dissipation plate; a plurality of switching elements joined to one surface of the heat dissipation plate; a first terminal located apart from the heat dissipation plate, extending in a direction away from the heat dissipation plate, and connected via first conductors to surfaces of the switching elements on a side opposite to the heat dissipation plate side; and a sealing member sealing the switching elements, the heat dissipation plate, and the first terminal. A cutout is provided at an outer periphery of the heat dissipation plate. A part of the first terminal on the heat dissipation plate side overlaps a cut-out area at the cutout as seen in a direction perpendicular to the one surface of the heat dissipation plate. A retracted portion retracted inward is formed at an outer periphery of another surface of the heat dissipation plate.

This semiconductor device includes: a heat dissipation plate formed in a plate shape; a plurality of switching elements joined to one surface of the heat dissipation plate; a first terminal extending in a direction away from the heat dissipation plate in a state of being apart from the heat dissipation plate, the first terminal being connected via a first electric conductor to surfaces of the plurality of switching elements on an opposite side to the heat dissipation plate side; and a sealing member sealing the plurality of switching elements, the heat dissipation plate, and the first terminal. A notch is provided in an outer periphery portion of the heat dissipation plate. A portion of the first terminal on the heat dissipation plate side overlaps with a region of a cut at the notch as seen in a direction perpendicular to the one surface of the heat dissipation plate.

An electronic circuit having a first terminal and a second terminal. The electronic circuit includes a plurality of diodes connected in parallel, the plurality of diodes including a first diode and a second diode that respectively have applied thereto a first forward voltage and a second forward voltage, the second forward voltage being higher than the first forward voltage. A first path and a second path are formed from the first terminal, respectively via the first diode and the second diode, to the second terminal. An inductance of the first path is larger than an inductance of the second path.

A semiconductor module, including: plurality of output elements provided to constitute an upper arm and a lower arm; a resin case provided surrounding an accommodation space for accommodating the output elements; an arm-to-arm wiring line for connecting the upper arm with the lower arm; an output terminal, which is connected to the arm-to-arm wiring line and is for outputting output currents from the output elements to a load being external to the semiconductor module; a sense terminal, which is connected to the arm-to-arm wiring line and is for detecting currents that flow in the output elements; and an inductor provided between a connection point for connecting the arm-to-arm wiring line with the output terminal, and the output terminal is provided. An inductance of the inductor is 1 μH or more.