An amplification device includes a base substrate, an amplification element, and a matching circuit board. The amplification element is mounted on the base substrate. The matching circuit board is mounted on the base substrate and includes a circuit pattern which is electrically connected to the amplification element. The matching circuit board includes a first side surface and a second side surface each extending in the longitudinal direction of the matching circuit board. A first recess is provided in the first side surface. A second recess facing the first recess is provided in the second side surface.

A radio frequency (RF) transistor amplifier package includes a submount, and first and second leads extending from a first side of the submount. The first and second leads are configured to provide RF signal connections to one or more transistor dies on a surface of the submount. At least one rivet is attached to the surface of the submount between the first and second leads on the first side. One or more corners of the first side of the submount may be free of rivets. Related devices and associated RF leads and non-RF leads are also discussed.

An apparatus includes: a transistor including an input terminal for an input signal and an output terminal for an output signal; a matching circuit configured to match a load impedance regarding a fundamental harmonic of at least one of the input signal and the output signal to an impedance of the transistor and include a first conductive film being laminated over the transistor and coupled to at least one of the input terminal and the output terminal; and a processing circuit configured to adjust an impedance regarding a harmonic of at least one of the input signal and the output signal and include a second conductive film being laminated over the first conductive film and coupled to at least one of the input terminal and the output terminal through a via which penetrates through a dielectric layer sandwiched between the first conductive film and the second conductive film.

RF amplifiers are provided that include a submount such as a thermally conductive flange. A dielectric substrate is mounted on an upper surface of the submount, the dielectric substrate having a first outer sidewall, a second outer sidewall that is opposite and substantially parallel to the first outer sidewall, and an interior opening. An RF amplifier die is mounted on the submount within the interior opening of the dielectric substrate, where a longitudinal axis of the RF amplifier die defines a first axis. The RF amplifier die is positioned so that a first angle defined by the intersection of the first axis with the first outer sidewall is between 5° and 45°. The dielectric substrate may be a ceramic substrate or a dielectric layer of a printed circuit board.

An electronic device has a substrate and first and second metallization levels with a resonant circuit. The first metallization level has a first dielectric layer on a side of the substrate, and a first metal layer on the first dielectric layer. The second metallization level has a second dielectric layer on the first dielectric layer and the first metal layer, and a second metal layer on the second dielectric layer. The electronic device includes a first plate in the first metal layer, and a second plate spaced apart from the first plate in the second metal layer to form a capacitor. The electronic device includes a winding in one of the first and second metal layers and coupled to one of the first and second plates in a resonant circuit.

An isolator device includes a laminate die having a dielectric laminate material with a metal laminate layer on one side of the dielectric laminate material, the metal laminate layer being a patterned layer providing at least a first plate, including a dielectric layer over the first plate that includes an aperture exposing a portion of the first plate. An integrated circuit (IC) including a substrate having a semiconductor surface includes circuitry including a transmitter and/or a receiver, the IC including a top metal layer providing at least a second plate coupled to a node in the circuitry, with at least one passivation layer on the top metal layer. A non-conductive die attach (NCDA) material for attaching a side of the dielectric laminate material is opposite the metal laminate layer to the IC so that the first plate is at least partially over the second plate to provide a capacitor.

New types, structures, and arrangements of capacitor networks for harmonic control and other purposes are presented. In one example, an integrated device includes a capacitor network and one or more power devices. The capacitor network includes a bond pad and metal-insulator-metal (MIM) capacitors. The capacitors include a first metal layer, a second metal layer, an insulator layer between the first and second metal layers, and one or more through-substrate vias. The first metal layer is coupled to the bond pad, and the second metal layer is coupled to a ground plane on a bottom side of the substrate by the vias. A number of capacitors can be arranged around the bond pad in the capacitor network for a tailored capacitance. A matching network in the integrated device can incorporate the capacitor network to reduce loss, provide better harmonic termination, and achieve better phase alignment for the power devices.

An integrated device provides a measure of a quantity dependent on current through an electrical conductor, having: a sensing and processing sub-system; an electrical conductor conducting current; an insulating material encapsulates the sensing and processing sub-system and maintains the electrical conductor in a fixed and spaced relationship to the sensing and processing sub-system. The insulating material insulates the electrical conductor from the sensing and processing sub-system. Sensing and processing sub-system sensing circuitry includes magnetic field sensing elements adjacent the electrical conductor. The sensing circuitry provides a measure of the quantity as a weighted sum and/or difference of magnetic field sensing elements outputs caused by current through the electrical conductor adjacent the magnetic field sensing elements. A voltage sensing input senses a measure of voltage associated with the current conductor. Sensing and processing sub-system output circuitry provides an output measure of the quantity from the sensed measure of current and voltage.

Example embodiments relate to RF amplifier packages. One example RF amplifier package includes an input terminal, an output terminal, a substrate, a first DC blocking capacitor having a first terminal and a grounded second terminal, and a second conductor die mounted on the substrate. The semiconductor die includes a semiconductor substrate, an RE power field-effect transistor (FET) integrated on the semiconductor substrate, a gate bondbar, a first drain bondbar, a second drain bondbar, and a plurality of first bondwires connecting the second drain bondbar to the first terminal of the first DC blocking capacitor. The RF power FET includes a plurality of gate fingers that are electrically connected to the gate bondbar and that each extend from the gate bondbar towards the first drain bondbar and underneath the second drain bondbar, a first set of drain fingers, and a second set of drain fingers.

Power amplifier (PA) packages, such as Doherty PA packages, containing multi-path integrated passive devices (IPDs) are disclosed. In embodiments, the PA package includes a package body through which first and second signal amplification paths extend, a first amplifier die within the package body and positioned in the first signal amplification path, and a second amplifier die within the package body and positioned in the second signal amplification path. A multi-path IPD is further contained in the package body. The multi-path IPD includes a first IPD region through which the first signal amplification path extends, a second IPD region through which the second signal amplification path extends, and an isolation region formed in the IPD substrate a location intermediate the first IPD region and the second IPD region.