A capacitor wire includes a core electrode line provided in the form of a wire, an outer electrode line covering at least a portion of the core electrode line, and a dielectric line interposed between the core electrode line and the outer electrode line. The outer electrode line comprises material having a melting point lower than material of the core electrode line.

A semiconductor device includes: a signal input circuit that receives a signal from an outside; a signal output circuit that outputs the signal to the outside; a coupling element connected between the signal input circuit and the signal output circuit; an inspection output circuit that causes the signal input circuit to output an inspection signal to the outside not via the coupling element or an inspection input circuit that causes the signal output circuit to receive the inspection signal from the outside not via the coupling element. The signal input circuit, the signal output circuit, and the coupling element are formed on a semiconductor chip and packaged.

An integrated device provides a measure of a quantity dependent on current through an electrical conductor, having: a sensing and processing sub-system; an electrical conductor conducting current; an insulating material encapsulates the sensing and processing sub-system and maintains the electrical conductor in a fixed and spaced relationship to the sensing and processing sub-system. The insulating material insulates the electrical conductor from the sensing and processing sub-system. Sensing and processing sub-system sensing circuitry includes magnetic field sensing elements adjacent the electrical conductor. The sensing circuitry provides a measure of the quantity as a weighted sum and/or difference of magnetic field sensing elements outputs caused by current through the electrical conductor adjacent the magnetic field sensing elements. A voltage sensing input senses a measure of voltage associated with the current conductor. Sensing and processing sub-system output circuitry provides an output measure of the quantity from the sensed measure of current and voltage.

In one embodiment, a power semiconductor module includes a main substrate, semiconductor chips mounted on the main substrate, and an auxiliary substrate also mounted on the main substrate. The power semiconductor module is capable of handling a current of 10 A or more. The auxiliary substrate is a printed circuit board having at least one carrier layer that is based on an organic material. The auxiliary substrate provides a common contact platform for at least some of the first semiconductor chips. The auxiliary substrate is attached to the main substrate by a joining layer located at a bottom side of the at least one auxiliary substrate facing the main substrate. The joining layer is a continuous organic adhesive layer of an adhesive foil or a double-faced adhesive tape.

The semiconductor device of the present invention includes an insulating layer, a high voltage coil and a low voltage coil which are disposed in the insulating layer at an interval in the vertical direction, a low potential portion which is provided in a low voltage region disposed around a high voltage region for the high voltage coil in planar view and is connected with potential lower than the high voltage coil, and an electric field shield portion which is disposed between the high voltage coil and the low voltage region and includes an electrically floated metal member.

A field effect transistor includes: a semiconductor region including a first inactive region, an active region, and a second inactive region arranged side by side in a first direction; a gate electrode, a source electrode, and a drain electrode on the active region; a gate pad on the first inactive region; a gate guard on and in contact with the semiconductor region, the gate guard being apart from the gate pad and located between an edge on the first inactive region side of the semiconductor region and the gate pad; a drain pad on the second inactive region; a drain guard on and in contact with the semiconductor region, the drain guard being apart from the drain pad and located between an edge on the second inactive region side of the semiconductor region and the drain pad; and a metal film electrically connected to the gate guard.

A packaged electronic device includes a die pad directly connected to a first set of conductive leads of a leadframe structure, a semiconductor die attached to the conductive die pad, a conductive support structure directly connected to a second set of conductive leads, and spaced apart from all other conductive structures of the leadframe structure. A magnetic assembly is attached to the conductive support structure, and a molded package structure that encloses the conductive die pad, the conductive support structure, the semiconductor die, the magnetic assembly and portions of the conductive leads, the molded package structure including a top side, and an opposite bottom side, wherein the lamination structure is centered between the top and bottom sides.

Various embodiments of the present disclosure are directed towards a method for forming a microelectromechanical systems (MEMS) device. The method includes forming a filter stack over a carrier substrate. The filter stack comprises a particle filter layer having a particle filter. A support structure layer is formed over the filter stack. The support structure layer is patterned to define a support structure in the support structure layer such that the support structure has one or more segments. The support structure is bonded to a MEMS structure.

A method of packaging an RF transistor device includes attaching one or more electronic devices to a carrier substrate, applying an encapsulant over at least one of the one or more electronic devices, and providing a protective structure on the carrier substrate over the one or more electronic devices. A packaged RF transistor device includes a carrier substrate, one or more electronic devices attached to the carrier substrate, an encapsulant material over at least one of the one or more electronic devices and extending onto the carrier substrate, and a protective structure on the carrier substrate over the one or more electronic devices and the encapsulant material.

In examples, a ceramic semiconductor package includes a first semiconductor die; a second semiconductor die; and a ceramic body including a ceramic member. The ceramic member comprises a first conductor on a top surface of the ceramic member and a second conductor. The second conductor includes a first member on the top surface of the ceramic member and separated from the first conductor, the first member coupled to a device side of the first semiconductor die; and a second member coupled to the first member by a vertical member, the second member extending horizontally within the ceramic member parallel to and coinciding vertically with the first conductor, the second member coupled to a device side of the second semiconductor die.