H01L2224/48225

HOUSING FOR A POWER SEMICONDUCTOR MODULE ARRANGEMENT

An arrangement includes a housing and a printed circuit board (PCB) arranged vertically above the housing. The housing includes: at least one protrusion attached to sidewalls and arranged on an outside of the housing at a lower end with at least one first through hole provided in the protrusion; holding devices each arranged inside a first through hole and/or between the PCB and the first through hole; and fastening elements configured to attach the housing to a heat sink or base plate. Each holding device is configured to clamp a corresponding fastening element such that the fastening elements are secured in defined positions, and to align each fastening element with a different first through hole. The PCB includes second through holes each arranged vertically above and aligned with a different fastening element. A diameter of each second through hole is less than the largest diameter of the respective fastening element.

SEMICONDUCTOR DEVICE
20230178535 · 2023-06-08 · ·

A semiconductor device includes: a plurality of semiconductor chips spaced apart from one another; and a conductive part. The plurality of semiconductor chips include respective semiconductor switching elements. The conductive part connects the plurality of semiconductor chips in parallel. A material of the semiconductor switching elements of the plurality of semiconductor chips includes a wide bandgap semiconductor. At least one of the semiconductor switching elements has a channel length of 1.5 μm or less.

POWER SEMICONDUCTOR MODULE, METHOD FOR ASSEMBLING A POWER SEMICONDUCTOR MODULE AND HOUSING FOR A POWER SEMICONDUCTOR MODULE
20230170287 · 2023-06-01 ·

A power semiconductor module includes: a substrate with a metallization layer attached to a dielectric insulation layer and a semiconductor body mounted to the metallization layer; a housing at least partly enclosing the substrate and having sidewalls and a cover that at least partly covers an opening formed by the sidewalls and has a flexible portion; and a press-on pin having arranged on the substrate or semiconductor body. A first end of the press-on pin faces the substrate or semiconductor body and extends towards the cover such that a second end of the press-on pin contacts the flexible portion of the cover. The substrate in an area vertically below the press-on pin has a first spring constant k.sub.1 in a vertical direction that is perpendicular to a top surface of the substrate. The flexible portion of the cover has a second spring constant k.sub.2, where 0.5*k.sub.1≤k.sub.2≤5*k.sub.1.

Terminal Element or Bus Bar, and Power Semiconductor Module Arrangement Comprising a Terminal Element or Bus Bar

A terminal element or bus bar for a power semiconductor module arrangement includes a first end configured to be arranged inside a housing of the power semiconductor module arrangement, a second end configured to be arranged outside of the housing of the power semiconductor module arrangement, and at least a first section and a second section arranged successively between the first end and the second end along a length of the terminal element or bus bar, wherein either the first section includes a first material, the second section includes a second material, and the first material differs from the second material, or the first section has a first thickness, the second section has a second thickness, and the first thickness differs from the second thickness, or both.

SEMICONDUCTOR DEVICE, POWER CONVERTER, MOVING VEHICLE, AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD
20230170323 · 2023-06-01 · ·

It is an object to provide technology enabling suppression of scattering of metal powder during ultrasonic bonding to suppress discharge and abnormal operation of a semiconductor device. A semiconductor device includes: an insulating substrate including an insulating layer and a metal pattern disposed on the insulating layer; and an electrode bonded on the metal pattern. The electrode includes, in a portion inward of a peripheral portion of a bonded surface being a surface of the electrode bonded on the metal pattern, a receiving portion recessed upward and capable of receiving metal powder generated during bonding of the electrode and the metal pattern, and the peripheral portion of the bonded surface of the electrode is bonded on the metal pattern.

POWER MODULE, PREPARATION MOLD, AND DEVICE
20230170269 · 2023-06-01 ·

A power module is provided. The power module includes a substrate, and the substrate is used to carry components and pins of the power module. A circuit layer is disposed on the substrate, to complete an electrical connection between the carried components. The components and the pins are disposed on a same surface of the substrate, and the components and the pins are electrically connected by using the substrate. The power module further includes a sealing layer. The sealing layer is sleeved on the pins, the pins are partially exposed on a surface that is of the sealing layer and that faces away from a plastic packaging layer, and a space for accommodating the plastic packaging layer is formed between the sealing layer and the substrate.

POWER SEMICONDUCTOR MODULE ARRANGEMENT
20220359319 · 2022-11-10 ·

A power semiconductor module arrangement includes: a housing; first and second electrical contacts within the housing; and a mounting arrangement including a frame or body and first and second terminal elements. The mounting arrangement is inserted in and coupled to the housing. First ends of the first and second terminal elements mechanically and electrically contact the first and second electrical contacts, respectively. A middle part of each terminal element extends through the frame or body. A second end of each terminal element extends outside the housing. The first terminal element is dielectrically insulated from the second terminal element by a portion of the frame or body. The first terminal element is injected into and inextricably coupled to the frame or body. The second terminal element is arranged within a hollow space inside the frame or body and is detachably coupled to the frame or body.

SEMICONDUCTOR DEVICE INCLUDING A SUSPENDED REINFORCING LAYER AND METHOD OF MANUFACTURING SAME

A semiconductor device includes a substrate, semiconductor dies on the substrate, molding compound and a reinforcing layer suspended within the molding compound. The reinforcing layer may for example be a copper foil formed in the molding compound over the semiconductor dies during the compression molding process. The reinforcing layer may have a structural rigidity which provides additional strength to the semiconductor device. The reinforcing layer may also be formed of a thermal conductor to draw heat away from a controller die within the semiconductor device.

SEMICONDUCTOR PACKAGE

A semiconductor package includes a first substrate, a first electronic component disposed on the first substrate, a second substrate disposed on the first substrate and provided with a cavity disposed in one surface of the second substrate, a first connection member connecting the first and second substrates to each other, a heat dissipation structure disposed on the second substrate and spaced apart from the first connection member, a second connection member disposed on the second substrate, and a via disposed on the second substrate, spaced apart from the heat dissipation structure, and connected to the first connection member. The second substrate includes a first region in which the cavity is disposed and a second region connected to the first substrate, and the heat dissipation structure is disposed in each of the first and second regions of the second substrate.

SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SAME

A semiconductor device includes a heat-dissipating base, a first conductive layer bonded to the top surface of the heat-dissipating base, an AlN insulating substrate bonded to the top surface of the first conductive layer, and an electrode terminal having one edge bending to form a bonding edge whose bottom surface faces the top surface of the second conductive layer and is solid-state bonded to a portion of the top surface of the second conductive layer. The crystal grain diameter at the bonded interface of the second conductive layer and electrode terminal is less than or equal to 1 μm, and indentations from the ultrasonic horn are left in the top surface of the bonding edge.