An electronic device includes electronic components and an epoxy resin portion which seals the electronic components. The electronic device is disposed in a refrigerant which cools the electronic components. A first layer having a three-dimensional crosslinking structure is formed on a surface or inside of the epoxy resin portion. The first layer is formed such that a length calculated by cube root of an average free volume in the three-dimensional crosslinking structure of the first layer is shorter than a length of the longest side of molecules forming the refrigerant.

A semiconductor device has wettable corner leads. A semiconductor die is mounted on a lead frame. Die bonding pads are electrically connected to leads of the lead frame. The die and electrical connections are encapsulated with a mold compound. The leads are exposed and flush with the corners of the device. The leads include dimples so that they are wettable, which facilitates inspection when the device is mounted on a circuit board or substrate.

A stacked die power converter package includes a lead frame including a die pad and a plurality of package pins, a first die including a first power transistor switch (first power transistor) attached to the die pad, and a first metal clip attached to one side of the first die. The first metal clip is coupled to at least one package pin. A second die including a second power transistor switch (second power transistor) is attached to another side on the first metal clip. A controller is provided by a controller die attached to a non-conductive layer on the second metal clip on one side of the second die.

The present disclosure provides a power semiconductor module in which a lead frame paddle is extended to form a source lead, a source electrode of a power semiconductor die is electrically connected to the lead frame paddle, a drain electrode is insulated from the lead frame paddle, and a part of the lead frame paddle is exposed to the outside of a mold.

A transistor device includes a metal submount; a transistor die arranged on said metal submount; at least one integrated passive device (IPD) component that includes a substrate arranged on said metal submount; and one or more interconnects extending between the transistor die and the at least one integrated passive device (IPD) component. The substrate includes a silicon carbide (SiC) substrate.

An integrated circuit package includes a die attach pad and a plurality of conductors formed from a lead frame material. A cavity is formed in a top surface of the die attach pad. A die attach adhesive is disposed within the cavity. A top surface of the die attach adhesive is flush with the top surface of the die attach pad. A semiconductor die is mounted on the die attach pad using the die attach adhesive. The semiconductor die is electrically connected to the plurality of conductors through a set of bond wires. A bottom surface of the semiconductor die is coplanar with the top surface of the die attach pad. A molding compound covers portions of the lead frame, the semiconductor die, and the set of bond wires.

A lead frame including a die pad having a first surface and a second surface opposite the first surface, a lead having a third surface flush with the first surface and a fourth surface opposite the third surface, and a link portion connecting the die pad and the lead, wherein the link portion includes a first portion that surrounds the die pad between the die pad and the lead in a plan view, wherein the first portion has a fifth surface flush with the first surface and the third surface, and has a sixth surface opposite the fifth surface, wherein the second surface is closer to a plane containing the first surface, the third surface, and the fifth surface than is the fourth surface, and wherein the sixth surface is closer to the plane containing the first surface, the third surface, and the fifth surface than is the second surface.

A semiconductor assembly includes a power semiconductor, a housing containing the power semiconductor, and electrically conductive channels. The electrically conductive channels are arranged to direct coolant through the housing. Heat generated by the power semiconductor can therefore be absorbed by the coolant. The electrically conductive channels are also electrically connected with the power semiconductor to form terminals for the power semiconductor.

A semiconductor device package that incorporates a combination of ceramic, organic, and metallic materials that are coupled using silver is provided. The silver is applied in the form of fine particles under pressure and a low temperature. After application, the silver forms a solid that has a typical melting point of silver, and therefore the finished package can withstand temperatures significantly higher than the manufacturing temperature. Further, since the silver is an interfacial material between the various combined materials, the effect of differing material properties between ceramic, organic, and metallic components, such as coefficient of thermal expansion, is reduced due to low temperature of bonding and the ductility of the silver.

A semiconductor device includes a device carrier, a first semiconductor chip mounted on the device carrier and a second semiconductor chip mounted on the device carrier. Further, the semiconductor device includes a first contact clip bonded to a first electrode of the first semiconductor chip, a second contact clip bonded to a first electrode of the second semiconductor chip and an insulating connector configured to hold the first contact clip and the second contact clip together.