A semiconductor device includes a first lead, a second lead, a control element, an insulating element, and a driver element. The control element and insulating element are mounted on a first pad portion of the first lead, while the driver element on a second pad portion of the second lead. In plan view, the first pad portion has a first edge adjacent to the second pad portion in a first direction and extending in a second direction perpendicular to the first direction. The first edge has first and second ends opposite in the second direction. The second pad portion has a second edge adjacent to the first edge and extending in the second direction. The second edge has third and fourth ends opposite in the second direction. One of the third and fourth end is located between the first and second end in the second direction.

A thermally conductive sheet has a thermally conductive resin composition layer, wherein the thermally conductive resin composition layer is made of a thermally conductive resin composition (1) including an inorganic filler and a binder resin (3). The inorganic filler includes a boron nitride particle (2), the content of the inorganic filler in the thermally conductive resin composition layer is 65% by volume or more, and the boron nitride particle (2) has an average aspect ratio of 7 or less, which is calculated from a major axis and a minor axis of a primary particle measured by a specific method. The thermally conductive resin composition layer has a thickness of 200 μm or less.

An electronic device has a conductive shield between first and second regions in a multilevel metallization structure, as well as a capacitor with first and second terminals in the first region, the first terminal laterally overlaps the second terminal by an overlap distance of 1.0 μm to 6.0 μm, the conductive shield includes a first metal line that encircles the first terminal, and the first metal line is spaced apart from the first terminal by a gap distance of 0.5 μm to 1.0 μm.

A package substrate includes a metallic lead frame that includes first frame portions in a lattice shape along planned dividing lines and a plurality of first electrode portions extending from each of the first frame portions, a connection frame that includes second frame portions in a lattice shape along the planned dividing lines and a plurality of second electrode portions extending from each of the second frame portions, the connection frame being superposed on a side of the lead frame on which a device chip is disposed, and a mold resin that covers the device chip and the connection frame. Distal ends of the second electrode portions are formed in a protruding shape and connected to the first electrode portions, and the connection frame forms an electrode when electroplating processing is applied to sections of the first electrode portions.

The present application describes a system in package which features no printed circuit board inside an encapsulation structure and comprises: a copper holder with a silicon layer at a top face; a plurality of dies mounted on the silicon layer and electrically connected to a plurality of data pins of the copper holder; a passive element mounted on the silicon layer and electrically connected to the dies wherein the dies are electrically connected to the ground pin of the copper holder; a molding compound encasing the dies and the passive element on the top face of the copper holder.

An electronic device which can suppress peeling off and damaging of the bonding material is provided. The electronic device includes an electronic component, a mounting portion, and a bonding material. The electronic component has an element front surface and an element back surface separated in the z-direction. The mounting portion has a mounting surface opposed to the element back surface on which the electronic component is mounted. The bonding material bonds the electronic component to the mounting portion. The bonding material includes a base portion and a fillet portion. The base portion is held between the electronic component and the mounting portion in the z-direction. The fillet portion is connected to the base portion and is formed outside the electronic component when seen in the z-direction. The electronic component includes two element lateral surface and ridges. The ridges are intersections of the two element lateral surface and extend in the z-direction. The fillet portion includes a ridge cover portion which covers at least a part of the ridges.

A semiconductor device 1 includes a silicon substrate 2, a drift layer 4 that is disposed on the silicon substrate 2 and constituted of a gallium oxide based semiconductor layer, and a buffer layer 3 that is interposed between the silicon substrate 2 and the drift layer 4. The buffer layer 3 is, for example, aluminum nitride (AlN). The buffer layer 3 is, for example, gallium oxide (Ga.sub.2O.sub.3).

The present disclosure includes: a base plate having a shape of a sheet; a relay plate having a shape of a sheet; a terminal member; and an electronic component joined to one surface of the base plate. The base plate, the relay plate, and the terminal member are electrically conductive members and arranged on a same plane with gaps between the electrically conductive members. The electronic component and one surface of the relay plate are connected to each other by a bonding wire. The one surface of the relay plate and one surface of the terminal member are connected to each other by a bonding wire.

A semiconductor device is provided. The semiconductor device comprises a semiconductor die comprising a semiconductor substrate and a plurality of transistors arranged at a front side of the semiconductor substrate. Further, the semiconductor die comprises a first electrically conductive structure extending from the front side of the semiconductor substrate to a backside of the semiconductor substrate and a second electrically conductive structure extending from the front side of the semiconductor substrate to the backside of the semiconductor substrate. The semiconductor device further comprises an interposer directly attached to the backside of the semiconductor substrate. The interposer comprises a first trace electrically connected to the first electrically conductive structure of the semiconductor die. Further the interposer comprises the first trace or a second trace electrically connected to the second electrically conductive structure of the semiconductor die.

A pre-molded leadframe includes a laminar structure having empty spaces therein and a first thickness with a die pad having opposed first and second die pad surfaces. Insulating pre-mold material is molded onto the laminar structure. The pre-mold material penetrates the empty spaces and provides a laminar pre-molded substrate having the first thickness with the first die pad surface left exposed. The die pad has a second thickness that is less than the first thickness. One or more pillar formations are provided protruding from the second die pad surface to a height equal to a difference between the first and second thicknesses. With the laminar structure clamped between surfaces of a mold, the first die pad surface and pillar formations abut against the mold surfaces. The die pad is thus effectively clamped between the clamping surfaces countering undesired flashing of the pre-mold material over the first die pad surface.