The invention discloses a structure of a chip on a soft panel, including a soft panel whereon a set of lead wires on an input terminal and a set of lead wires on an output terminal deposited, a bonding region formed on each end of the lead wires on the output terminal; a driver chip, which is deposited on the soft panel and connected to the lead wires on the input terminal and that on the output terminal electrically; a connection of the bonding region and an end of the corresponding lead wire is defined as A, and where the bonding region apart from the end of the corresponding lead wire on the output terminal is defined as B, a distance between A and B is L, an area of the bonding region is larger than that of the corresponding lead wire on the output terminal in the distance L.

A bonded structure is disclosed. The bonded structure can include a semiconductor element comprising active circuitry. The bonded structure can include a protective element directly bonded to the semiconductor element without an adhesive along a bonding interface. The protective element can include an obstructive material disposed over at least a portion of the active circuitry. The obstructive material can be configured to obstruct external access to the active circuitry. The bonded structure can include a disruption structure configured to disrupt functionality of the at least a portion of the active circuitry upon debonding of the protective element from the semiconductor element.

Shielding for flip chip devices. In some embodiments, a shielded assembly can include a substrate and a flip chip die having a front side and a back side, with the including an integrated circuit implemented on the front side, and the front side of the flip chip die being mounted to the substrate. The shielded assembly can further include a shielding component implemented over the back side of the flip chip die to provide electromagnetic shielding between a first region within or on the flip chip die and a second region away from the flip chip die.

Shielding for flip chip devices. In some embodiments, a shielded assembly can include a substrate and a flip chip die having a front side and a back side, with the including an integrated circuit implemented on the front side, and the front side of the flip chip die being mounted to the substrate. The shielded assembly can further include a shielding component implemented over the back side of the flip chip die to provide electromagnetic shielding between a first region within or on the flip chip die and a second region away from the flip chip die.

A semiconductor integrated circuit device includes a first terminal arranged to accept an external input of an analog input signal, an amplifier configured to amplify the analog input signal to generate an amplified signal, a logic unit configured to generate a digital output signal that is in accordance with the amplified signal, and a second terminal arranged to externally output an analog output signal that is in accordance with the amplified signal. The first terminal is disposed at a first side of a package, and the second terminal is disposed at a second side which is different from the first side.

Embodiments of the disclosure provide an optical sensing system and an optical sensing method thereof. The optical sensing system comprises a light source configured to emit an optical signal into an environment surrounding the optical sensing system. The optical sensing system further comprises a photodetector configured to receive the optical signal reflected from the environment of the optical sensing system, and convert the optical signal to an electrical signal, where the photodetector is disposed in a package. The optical sensing system additionally comprises a readout circuit configured to generate a readout signal based on the electrical signal received from the photodetector, where the readout circuit is disposed in the same package as the photodetector and connected to the photodetector through routings in the package.

A semiconductor module includes a laminated substrate that includes a heat radiating plate, and an insulation layer having a conductive pattern thereof and being disposed on a top surface of the heat radiating plate, a semiconductor element disposed on a top surface of the conductive pattern, an integrated circuit that controls driving of the semiconductor element, a control-side lead frame having a primary surface on which the integrated circuit is disposed, and a mold resin that seals the laminated substrate, the semiconductor element, the integrated circuit, and the control-side lead frame. The control-side lead frame has a rod-shaped first pin having a first end, a first end side of the first pin extending toward the top surface of the heat radiating plate, and the heat radiating plate has at least one insertion hole into one of which the first end of the first pin is press-fitted.

An isolation system and isolation device are disclosed. An illustrative isolation device is disclosed to include a transmitter circuit, a detector circuit, a first wire bond, and a second wire bond. The detector circuit is configured to generate a first current in accordance with a first signal. The first wire bond is configured to receive the first current from the transmitter circuit to generate a magnetic flux. The second wire bond is configured to receive the magnetic flux. An induced current in the second wire bond is then detected in the detector circuit. The detector circuit is configured to generate a reproduced first signal, as an output of the detector circuit.

The present disclosure is directed to a semiconductor die with multiple contact pads electrically coupled to a single lead via a single wire, and methods for fabricating the same. In one or more embodiments, multiple contact pads are electrically coupled to each other by a plurality of conductive layers stacked on top of each other. The uppermost conductive layer is then electrically coupled to a single lead via a single wire.

A packaged semiconductor device includes a carrier having a die attach surface, a semiconductor die mounted on the die attach surface and comprising first and second conductive terminals disposed on an upper side, a first clip that extends over the semiconductor die and is electrically connected to the first conductive terminal, a second clip that extends over the semiconductor die and is electrically connected to the second conductive terminal, and an electrically insulating encapsulant body that encapsulates the semiconductor die. An outer end of the first clip is exposed from the encapsulant body and provides a point of external electrical contact for the first conductive terminal. An outer end of the second clip is exposed from the same or a different side face of the encapsulant body as the first clip and provides a point of external electrical contact for the second conductive terminal.