A semiconductor package according to an aspect of the present disclosure includes a package substrate and a plurality of semiconductor chips stacked on the package substrate. Each of the semiconductor chips includes a chip body, at least one first side power pad and at least one first side ground pad that are disposed on a first side portion on one surface of the chip body, and at least one second side power pad and at least one second side ground pad that are disposed on a second side portion opposite to the first side portion on one surface of the chip body. One of the second side power pads is disposed point-symmetrically to corresponding one of the first side power pads with respect to a reference point on the one surface, and one of the second side ground pads is disposed point-symmetrically to corresponding one of the first side ground pads with respect to a reference point on the one surface.

A semiconductor package includes a package substrate including a first substrate channel pad and a second substrate channel pad, a chip stack including a plurality of semiconductor chips stacked on the package substrate to be offset in a first direction, wherein first semiconductor chips located on odd layers from among the plurality of semiconductor chips and second semiconductor chips located on even layers from among the plurality of semiconductor chips are offset in a second direction perpendicular to the first direction, each of the first semiconductor chips includes a first chip channel pad, and each of the second semiconductor chips includes a second chip channel pad, first inter-chip connection wires configured to electrically connect the first chip channel pads of the first semiconductor chips to one another, second inter-chip connection wires configured to electrically connect the second chip channel pads of the second semiconductor chips to one another.

A connecting strip of conductive elastic material having an arched shape having a concave side and a convex side. The connecting strip is fixed at the ends to a support carrying a die with the convex side facing the support. During bonding, the connecting strip undergoes elastic deformation and presses against the die, thus electrically connecting the at least one die to the support.

Millimeter wave (mmWave) technology, apparatuses, and methods that relate to transceivers, receivers, and antenna structures for wireless communications are described. The various aspects include co-located millimeter wave (mmWave) and near-field communication (NFC) antennas, scalable phased array radio transceiver architecture (SPARTA), phased array distributed communication system with MIMO support and phase noise synchronization over a single coax cable, communicating RF signals over cable (RFoC) in a distributed phased array communication system, clock noise leakage reduction, IF-to-RF companion chip for backwards and forwards compatibility and modularity, on-package matching networks, 5G scalable receiver (Rx) architecture, among others.

Leadless power amplifier (PA) packages and methods for fabricating leadless PA packages having topside terminations are disclosed. In embodiments, the method includes providing electrically-conductive pillar supports and a base flange. At least a first radio frequency (RF) power die is attached to a die mount surface of the base flange and electrically interconnected with the pillar supports. Pillar contacts are further provided, with the pillar contacts electrically coupled to the pillar supports and projecting therefrom in a package height direction. The first RF power die is enclosed in a package body, which at least partially defines a package topside surface opposite a lower surface of the base flange. Topside input/out terminals are formed, which are accessible from the package topside surface and which are electrically interconnected with the first RF power die through the pillar contacts and the pillar supports.

An isolation system and isolation device are disclosed. An illustrative isolation device is disclosed to include a transmitter circuit, a detector circuit, a first wire bond, and a second wire bond. The detector circuit is configured to generate a first current in accordance with a first signal. The first wire bond is configured to receive the first current from the transmitter circuit to generate a magnetic flux. The second wire bond is configured to receive the magnetic flux. An induced current in the second wire bond is then detected in the detector circuit. The detector circuit is configured to generate a reproduced first signal, as an output of the detector circuit.

Millimeter wave (mmWave) technology, apparatuses, and methods that relate to transceivers, receivers, and antenna structures for wireless communications are described. The various aspects include co-located millimeter wave (mmWave) and near-field communication (NFC) antennas, scalable phased array radio transceiver architecture (SPARTA), phased array distributed communication system with MIMO support and phase noise synchronization over a single coax cable, communicating RF signals over cable (RFoC) in a distributed phased array communication system, clock noise leakage reduction, IF-to-RF companion chip for backwards and forwards compatibility and modularity, on-package matching networks, 5G scalable receiver (Rx) architecture, among others.

The present disclosure relates to a ring-frame power package that includes a thermal carrier, a spacer ring residing on the thermal carrier, and a ring structure residing on the spacer ring. The ring structure includes a ring body and a number of interconnect tabs that protrude from an outer periphery of the ring body. Herein, a portion of the carrier surface of the thermal carrier is exposed through an interior opening of the spacer ring and an interior opening of the ring body. The spacer ring is not electronically conductive and prevents the interconnect tabs from electrically coupling to the thermal carrier. Each interconnect tab includes a top plated area and a bottom plated area, which is electrically coupled to the top plated area.

A packaged RF device is provided that utilizes flexible circuit leads. The RF device includes at least one integrated circuit (IC) die configured to implement the RF device. The IC die is contained inside a package. In accordance with the embodiments described herein, a flexible circuit is implemented as a lead. Specifically, the flexible circuit lead is coupled to the at least one IC die inside the package and extends to outside the package, the flexible circuit lead thus providing an electrical connection to the at least one IC die inside the package.

An electronic package structure and a chip thereof are provided. The electronic package structure includes a substrate, a chip, a plurality of signal wires, and a core ground wire. The chip disposed on and electrically connected to the substrate has a core wiring region and an input and output pad region located at a top surface thereof. The input and output pad region is located between the core wiring region and an edge of the chip. The chip includes a plurality of signal pads in the input and output region and a core ground pad adjacent to one of the signal pads. The core ground pad located in the core wiring region. The signal wires are respectively connected to the signal pads. The core ground wire connected to the core ground pad is adjacent to and shields one of the signal wires.