A method for sawing a semiconductor wafer is provided. The method includes sawing a semiconductor wafer to form a first opening. In addition, the semiconductor wafer includes a dicing tape and a substrate attached to the dicing tape by a die attach film (DAF), and the first opening is formed in an upper portion of the substrate. The method further includes sawing through the substrate and the DAF of the semiconductor wafer from the first opening to form a middle opening under the first opening and a second opening under the middle opening, so that the semiconductor wafer is divided into two dies. In addition, a slope of a sidewall of the middle opening is different from slopes of sidewalls of the first opening and the second opening.

A method for sawing a semiconductor wafer is provided. The method includes sawing a semiconductor wafer to form a first opening. In addition, the semiconductor wafer includes a dicing tape and a substrate attached to the dicing tape by a die attach film (DAF), and the first opening is formed in an upper portion of the substrate. The method further includes sawing through the substrate and the DAF of the semiconductor wafer from the first opening to form a middle opening under the first opening and a second opening under the middle opening, so that the semiconductor wafer is divided into two dies. In addition, a slope of a sidewall of the middle opening is different from slopes of sidewalls of the first opening and the second opening.

In an embodiment, a semiconductor device includes: a mounting substrate having electrically conductive formations thereon, a semiconductor die coupled with the mounting substrate, the semiconductor die with electrical contact pillars facing towards the mounting substrate, an anisotropic conductive membrane between the semiconductor die and the mounting substrate, the membrane compressed between the electrical contact pillars and the mounting substrate to provide electrical contact between the electrical contact pillars of the semiconductor die and the electrically conductive formations on the mounting substrate.

In an embodiment, a semiconductor device includes: a mounting substrate having electrically conductive formations thereon, a semiconductor die coupled with the mounting substrate, the semiconductor die with electrical contact pillars facing towards the mounting substrate, an anisotropic conductive membrane between the semiconductor die and the mounting substrate, the membrane compressed between the electrical contact pillars and the mounting substrate to provide electrical contact between the electrical contact pillars of the semiconductor die and the electrically conductive formations on the mounting substrate.

A display device includes an array substrate, two light-emitting element substrates, a plurality of first connection elements, and a plurality of second connection elements. The array substrate includes two pixel circuits. Each of the pixel circuits includes three sub-pixel circuits, three first conductive pads, and a second conductive pad. Each of the light-emitting element substrates includes three light-emitting elements, three first connection pads, and a second connection pad. The first connection elements respectively and electrically connect corresponding one of the first conductive pads to corresponding one of the first connection pads. The second connection elements respectively and electrically connect corresponding one of the second conductive pads to corresponding one of the second connection pads.

A display device includes an array substrate, two light-emitting element substrates, a plurality of first connection elements, and a plurality of second connection elements. The array substrate includes two pixel circuits. Each of the pixel circuits includes three sub-pixel circuits, three first conductive pads, and a second conductive pad. Each of the light-emitting element substrates includes three light-emitting elements, three first connection pads, and a second connection pad. The first connection elements respectively and electrically connect corresponding one of the first conductive pads to corresponding one of the first connection pads. The second connection elements respectively and electrically connect corresponding one of the second conductive pads to corresponding one of the second connection pads.

Provided herein is a solder paste having low viscosity and easy coatability, and that provides high reinforcement for electronic components while satisfying both high room-temperature adhesion and high repairability, and forming a cured product of excellent properties, for example, high insulation against humidity. Amount structure including an electronic component mounted with the solder paste is also provided. The solder paste contains a solder powder and a flux. The flux contains an epoxy resin, a reactive diluent, a curing agent, an organic acid, and a rubber modified epoxy resin. The reactive diluent contains a compound having two or more epoxy groups, and has a viscosity of 150 mPa.Math.s or more and 700 mPa.Math.s or less. The reactive diluent has a total chlorine content of 0.5 weight % or less, and is contained in a proportion of 5 weight % or more and 45 weight % or less with respect to a total weight of the flux.

Provided herein is a solder paste having low viscosity and easy coatability, and that provides high reinforcement for electronic components while satisfying both high room-temperature adhesion and high repairability, and forming a cured product of excellent properties, for example, high insulation against humidity. Amount structure including an electronic component mounted with the solder paste is also provided. The solder paste contains a solder powder and a flux. The flux contains an epoxy resin, a reactive diluent, a curing agent, an organic acid, and a rubber modified epoxy resin. The reactive diluent contains a compound having two or more epoxy groups, and has a viscosity of 150 mPa.Math.s or more and 700 mPa.Math.s or less. The reactive diluent has a total chlorine content of 0.5 weight % or less, and is contained in a proportion of 5 weight % or more and 45 weight % or less with respect to a total weight of the flux.

The method of bonding an interposer and an integrated circuit chip includes preparing an interposer including an insulator and conductive lines each having one end exposed to a first surface of the insulator and another end exposed to a second surface opposite to the first surface; placing a bonding mask on the interposer; forming through-holes on the bonding mask before or after the placing of the bonding mask on the interposer; filling the plurality with a conductive material; and bonding an integrated circuit chip to the bonding mask.

The method of bonding an interposer and an integrated circuit chip includes preparing an interposer including an insulator and conductive lines each having one end exposed to a first surface of the insulator and another end exposed to a second surface opposite to the first surface; placing a bonding mask on the interposer; forming through-holes on the bonding mask before or after the placing of the bonding mask on the interposer; filling the plurality with a conductive material; and bonding an integrated circuit chip to the bonding mask.