A multi-switch types hybrid power electronics build block (MST HPEBB) least replaceable unit converter employs a first low voltage side (for example, 1000 volt power switches) and a second high voltage side (for example, 3000 volt power switches). The MST HPEBB LRU employs multiple bridge converters connected in series and/or in parallel, and coupled in part by a 1:1 transformer. To reduce weight and volume requirements compared to known PEBB LRUs, different power switch types are employed in different bridge converters. For example, in one exemplary embodiment, low voltage 1.7 kVolt SiC MOSFETS may be employed on the lower voltage side, while at least some 4.5 kVolt Silicon IGBTs may be employed on the high voltage side.

A current source inverter includes a first phase leg including a plurality of switching devices, a second phase leg including a plurality of switching devices, and a third phase leg including a plurality of switching devices. The current source inverter also includes a zero-state phase leg including at least one switching device, wherein the zero-state phase leg is configured to transition from an open state to prevent current flow to a closed state to allow current flow between a positive and negative terminal during a dead-band time.

A resonance oscillator circuit is provided to include first and second oscillators. The first oscillator includes a first LC resonator circuit and an amplifier element, and oscillates by shifting a phase of an output voltage with a predetermined phase difference and feeding the output voltage back to the amplifier element. The second oscillator oscillates by generating a gate signal, which has a frequency identical to that of the output voltage, and drives the amplifier element, by shifting the phase of the output voltage with the phase difference and feeding the gate signal back to an input terminal of the amplifier element, by using the amplifier element as a switching element and using the first oscillator as a feedback circuit. The phase difference is a value substantially independent of an inductance of the first LC resonator circuit and a load, to which the output voltage is applied.

A compact inverter system includes a bus bar. The bus bar includes a terminal for connection to a positive terminal of a DC voltage supply. The compact inverter also includes a heat sink, a first transistor, and a second transistor. The first transistor has first and second terminals between which current is transmitted when the first transistor is activated, and a first gate terminal controlling the first transistor. The first terminal of the first transistor is thermally and electrically connected to the bus bar. The second transistor has first and second terminals between which current is transmitted when the second transistor is activated, and a second gate terminal controlling the second transistor. The first terminal of the second transistor is thermally and electrically connected to the heat sink. The first and second transistors are positioned between the bus bar and the heat sink. The first transistor is positioned between the second transistor and the bus bar. The second transistor is positioned between the first transistor and the heat sink.

A device for feeding electrical energy into a three-phase electrical supply network having a line voltage, a line frequency, a nominal line voltage and a nominal line frequency, comprising: an inverter having at least one property from: a power response to a frequency disturbance in the electrical supply network; a current response to a voltage disturbance in the electrical supply network; a current response to a network disturbance a phase jump capability which permits a phase jump of the line voltage to be passed through by at least 20°; a feed-in of electrical voltages and/or currents to minimize found harmonic oscillations of the voltage or the currents in the electrical supply network; a feed-in of electrical currents to minimize voltage asymmetries in the electrical supply network; and a feed-in of electrical power, which is intended to carry out an attenuation of network oscillations in the electrical supply network.

A resonance oscillator circuit is provided to include first and second oscillators. The first oscillator includes a first LC resonator circuit and an amplifier element, and oscillates by shifting a phase of an output voltage with a predetermined phase difference and feeding the output voltage back to the amplifier element. The second oscillator oscillates by generating a gate signal, which has a frequency identical to that of the output voltage, and drives the amplifier element, by shifting the phase of the output voltage with the phase difference and feeding the gate signal back to an input terminal of the amplifier element, by using the amplifier element as a switching element and using the first oscillator as a feedback circuit. The phase difference is a value substantially independent of an inductance of the first LC resonator circuit and a load, to which the output voltage is applied.

Disclosed is an apparatus including: a photovoltaic panel; a CPG controller configured to receive a limit output power value of a photovoltaic panel, a photovoltaic panel terminal voltage, and a photovoltaic panel output current and output a photovoltaic panel terminal voltage reference; a direct current (DC)-voltage controller configured to receive the photovoltaic panel terminal voltage reference and the photovoltaic panel terminal voltage and output a duty ratio to cause an error between these values to become zero; a pulse width modulation (PWM) control signal generator configured to receive the duty ratio and output a PWM signal to control a DC/DC converter connected to the photovoltaic panel; the DC/DC converter configured to receive the PWM signals and perform CPG control; and a DC/AC inverter connected to the DC/DC converter and configured to convert DC power into AC power and output the AC power to an electrical grid.

A power converting apparatus for applying to a load an alternating-current voltage converted from a direct-current voltage includes an inverter that receives a PWM signal and applies the alternating-current voltage to the load and an inverter control unit that generates the PWM signal and supplies the PWM signal to the inverter. The frequency of the PWM signal is an integer multiple of the frequency of the alternating-current voltage. The alternating-current voltage includes a plurality of positive pulses and a plurality of negative pulses in one cycle of the alternating-current voltage. The number of the positive pulses and the number of the negative pulses are equal.

A power converter for converting a DC input voltage into an AC output voltage, the power converter having a structure of Phi-2 type, and includes an input terminal for the DC input voltage, an output terminal for the AC output voltage, a power switch equipped with a control electrode, a first electrode and a second electrode linked to a reference potential, the power switch being configured to receive a drive signal at the control electrode, the converter further comprising a self-oscillating circuit, connected between the output terminal and the control electrode, and configured to supply and maintain a sinusoidal drive signal to the power switch from the output voltage.

A compact inverter system includes a bus bar. The bus bar includes a terminal for connection to a positive terminal of a DC voltage supply. The compact inverter also includes a heat sink, a first transistor, and a second transistor. The first transistor has first and second terminals between which current is transmitted when the first transistor is activated, and a first gate terminal controlling the first transistor. The first terminal of the first transistor is thermally and electrically connected to the bus bar. The second transistor has first and second terminals between which current is transmitted when the second transistor is activated, and a second gate terminal controlling the second transistor. The first terminal of the second transistor is thermally and electrically connected to the heat sink. The first and second transistors are positioned between the bus bar and the heat sink. The first transistor is positioned between the second transistor and the bus bar. The second transistor is positioned between the first transistor and the heat sink.