A method for forming a thin film according to an exemplary embodiment of the present invention includes forming the thin film at a power density in the range of approximately 1.5 to approximately 3 W/cm.sup.2 and at a pressure of an inert gas that is in the range of approximately 0.2 to approximately 0.3 Pa. This process results in an amorphous metal thin film barrier layer that prevents undesired diffusion from adjacent layers, even when this barrier layer is thinner than many conventional barrier layers.

A method of forming a semiconductor device includes forming an opening in a dielectric layer, and forming a barrier layer in the opening. A combined liner layer is formed over the barrier layer by first forming a first liner layer over the barrier layer, and forming a second liner layer over the first liner layer, such that the first liner layer and the second liner layer intermix. A conductive material layer is formed over the combined liner layer, and a thermal process is performed to reflow the conductive material layer.

According to an embodiment, a processing apparatus includes a generator mount, a first-object mount, and a first collimator. A particle generator capable of emitting particles is placed on the generator mount. A first object is placed on the first-object mount. The first collimator is placed between the generator mount and the first-object mount, and has first walls and second walls. In the first collimator, the first walls and the second walls form first through holes extending in a first direction from the generator mount to the first-object mount. Each of the second walls is provided with at least one first passage.

An electrically and magnetically enhanced ionized physical vapor deposition (I-PVD) magnetron apparatus and method is provided for sputtering material from a cathode target on a substrate, and in particular, for sputtering ceramic and diamond-like coatings. The electrically and magnetically enhanced magnetron sputtering source has unbalanced magnetic fields that couple the cathode target and additional electrode together. The additional electrode is electrically isolated from ground and connected to a power supply that can generate positive, negative, or bipolar high frequency voltages, and is preferably a radio frequency (RF) power supply. RF discharge near the additional electrode increases plasma density and a degree of ionization of sputtered material atoms.

Aspects of this disclosure relate to selectively shielded radio frequency modules. A radio frequency module can include a package substrate, a radio frequency component on the package substrate, a multi-layer antenna, a radio frequency shielding structure configured to provide shielding between the multi-layer antenna and the radio frequency component. The radio frequency shielding structure can include a shielding layer providing a shield over the radio frequency component and leaving the radio frequency module unshielded over the antenna.

A semiconductor structure includes a multi-level interconnect structure, a passivation layer, a barrier layer, and a pad layer. The passivation layer is above the multi-level interconnect structure. The barrier layer lines an inner sidewall of the passivation layer, a top surface of the passivation layer and a top surface of a conductive line of the multi-level interconnect structure. The barrier layer includes a first layer, a second layer, a third layer, and a fourth layer. The first layer is in a nano-crystalline phase. The second layer is above the first layer and in an amorphous phase. The third layer is above the second layer and in a polycrystalline phase. The fourth layer is above the third layer and in a nano-crystalline phase. The pad layer is above the barrier layer.

A method is provided for fabricating a semiconductor structure. The method includes providing a substrate having a dielectric layer formed on the substrate, where an opening is formed in the dielectric layer, and bottom of the opening exposes surface of the substrate. The method also includes forming a first metal layer over of the dielectric layer, where a temperature for forming the first metal layer is a first temperature. In addition, the method includes forming a second metal layer filling the opening, where a temperature for forming the second metal layer is a second temperature, and the second temperature is higher than the first temperature. Further, the method includes planarizing the second metal layer and the first metal layer until the top surface of the dielectric layer is exposed.

A method of forming an interconnect structure for semiconductor devices is described. The method comprises depositing an etch stop layer on a substrate by physical vapor deposition followed by in situ deposition of a metal layer on the etch stop layer. The in situ deposition comprises flowing a plasma processing gas into the chamber and exciting the plasma processing gas into a plasma to deposit the metal layer on the etch stop layer on the substrate. The substrate is continuously under vacuum and is not exposed to ambient air during the deposition processes.

Discussed generally herein are methods and devices including or providing an electromagnetic interference (EMI) shielding. A device can include substrate including electrical connection circuitry therein, ground circuitry on, or at least partially in the substrate, the ground circuitry at least partially exposed by a surface of the substrate, a die electrically connected to the connection circuitry and the ground circuitry, the die on the substrate, a conductive material on a die backside, and a conductive paste or one or more wires electrically connected to the ground circuitry and the conductive material.

A semiconductor device includes a power device and a temperature detection diode. The semiconductor device has a device structure configured to insulate between a power lien of the power device and the temperature detection diode.