A ruthenium film forming method includes a deposition process of introducing a mixed gas of a ruthenium carbonyl gas and a CO gas into a processing vessel 1 by supplying the CO gas as a carrier gas from a CO gas container 43 configured to contain the CO gas into a film forming source container 41 configured to contain ruthenium carbonyl in a solid state as a film forming source material, and forming ruthenium film by decomposing the ruthenium carbonyl on a wafer W; and a CO gas introduction process of bringing the CO gas into contact with a surface of the wafer W by introducing the CO gas directly into the processing vessel 1 from the CO gas container 43 after stopping the introducing of the mixed gas into the processing vessel 1. The deposition process and the CO gas introduction process are repeated multiple times.

The present disclosure relates to a semiconductor device and a method for forming a semiconductor device with a graphene conductive structure. The semiconductor device includes a first gate structure disposed over a semiconductor substrate, and a first source/drain region disposed in the semiconductor substrate and adjacent to the first gate structure. The semiconductor device also includes a first silicide layer disposed in the semiconductor substrate and over the first source/drain region, and a graphene conductive structure disposed over the first silicide layer. The semiconductor device further includes a first dielectric layer covering the first gate structure, and a second dielectric layer disposed over the first dielectric layer. The graphene conductive structure is surrounded by the first dielectric layer and the second dielectric layer.

A substrate processing method is for forming a metal film on a target substrate by using a plasma. The method includes loading a target substrate having a silicon-containing layer on a surface thereof into a processing chamber which is pre-coated by a film containing a metal, introducing hydrogen gas and a gaseous compound of the metal and halogen into the processing chamber, generating a plasma, and forming a metal film on the target substrate. The method further includes performing a first reduction process of forming an atmosphere of a plasma obtained by activating hydrogen gas in the processing chamber, unloading the target substrate from the processing chamber, performing a second reduction process of forming an atmosphere of a plasma obtained by activating hydrogen gas in the processing chamber, and loading a next target substrate into the processing chamber.

A method of manufacturing a semiconductor device, includes: alternately performing (i) a first step of alternately supplying a first raw material containing a first metal element and a halogen element and a second raw material containing a second metal element and carbon to a substrate by a first predetermined number of times, and (ii) a second step of supplying a nitridation raw material to the substrate, by a second predetermined number of times, wherein alternating the first and second steps forms a metal carbonitride film containing the first metal element having a predetermined thickness on the substrate.

A method of depositing a film is provided. In the method, one operation of a unit of film deposition process is performed by carrying a substrate into a processing chamber, by depositing a nitride film on the substrate, and by carrying the substrate out of the processing chamber after finishing depositing the nitride film on the substrate. The one operation is repeated a predetermined plurality of number of times continuously to deposit the nitride film on a plurality of substrates continuously. After that, an inside of the processing chamber is oxidized by supplying an oxidation gas into the processing chamber.

Implementations described herein generally relate to methods for forming tungsten materials on substrates using vapor deposition processes. The method comprises positioning a substrate having a feature formed therein in a substrate processing chamber, depositing a first film of a bulk tungsten layer by introducing a continuous flow of a hydrogen containing gas and a tungsten halide compound to the processing chamber to deposit the first tungsten film over the feature, etching the first film of the bulk tungsten layer using a plasma treatment to remove a portion of the first film by exposing the first film to a continuous flow of the tungsten halide compound and an activated treatment gas and depositing a second film of the bulk tungsten layer by introducing a continuous flow of the hydrogen containing gas and the tungsten halide compound to the processing chamber to deposit the second tungsten film over the first tungsten film.

Provided herein are methods of depositing void-free cobalt into features with high aspect ratios. Methods involve (a) partially filling a feature with cobalt, (b) exposing the feature to a plasma generated from nitrogen-containing gas to selectively inhibit cobalt nucleation on surfaces near or at the top of the feature, optionally repeating (a) and (b), and depositing bulk cobalt into the feature by chemical vapor deposition. Methods may also involve exposing a feature including a barrier layer to a plasma generated from nitrogen-containing gas to selectively inhibit cobalt nucleation. The methods may be performed at low temperatures less than about 400° C. using cobalt-containing precursors. Methods may also involve using a remote plasma source to generate the nitrogen-based plasma. Methods also involve annealing the substrate.

Methods for depositing a metal film on a doped amorphous silicon layer as a nucleation layer and/or a glue layer on a substrate. Some embodiments further comprise the incorporation of a glue layer to increase the ability of the doped amorphous silicon layer and metal layer to stick to the substrate.

A ferroelectric capacitor having a doped graphene bottom electrode and uses thereof are described. The doped graphene bottom electrode layer is deposited on a substrate with a ferroelectric layer deposited between the doped graphene layer and a top electrode.

According to an embodiment, a semiconductor memory device comprises: a stacked body including control gate electrodes stacked upwardly of a substrate; a semiconductor layer facing the control gate electrodes; and a gate insulating layer provided between the control gate electrode and the semiconductor layer. The stacked body comprises: a first metal layer configuring the control gate electrode; a first barrier metal layer contacting an upper surface of this first metal layer; a first silicon nitride layer contacting an upper surface of this first barrier metal layer; a first inter-layer insulating layer contacting an upper surface of this first silicon nitride layer; a second barrier metal layer contacting a lower surface of the first metal layer; a second silicon nitride layer contacting a lower surface of this second barrier metal layer; and a second inter-layer insulating layer contacting a lower surface of this second silicon nitride layer.