Disclosed herein is a new and improved system and method for fabricating diamond semiconductors. The method may include the steps of selecting a diamond semiconductor material having a surface, exposing the surface to a source gas in an etching chamber, forming a carbide interface contact layer on the surface; and forming a metal layer on the interface layer.

A semiconductor device includes a transistor on a substrate, a first metal layer that is on the transistor and includes a lower wire electrically connected to the transistor, and a second metal layer on the first metal layer. The second metal layer includes an upper wire that is electrically connected to the lower wire and includes a via structure in a via hole and a line structure in a line trench. The via structure includes a via portion that is in the via hole and is coupled to the lower wire, and a barrier portion that vertically extends from the via portion to cover an inner surface of the line trench. The barrier portion is between the line structure and an insulating layer of the second metal layer. The barrier portion is thicker at its lower level than at its upper level.

A method of manufacturing an electrode layer and a method of manufacturing a capacitor using the same are provided. The method of manufacturing the electrode layer includes performing a first sub-cycle sequentially providing a tin precursor and an oxygen source on a substrate, performing a second sub-cycle sequentially providing a tin precursor, a tantalum precursor, and an oxygen source on the substrate on which the first sub-cycle is performed, and repeating a cycle including the first sub-cycle and the second sub-cycle to form a tantalum-doped tin oxide layer on the substrate. A tantalum concentration in the tantalum-doped tin oxide layer is determined by the tin precursor provided in the second sub-cycle.

In one embodiment, a method, a method of manufacturing a semiconductor is disclosed. A monitored semiconductor manufacturing system (monitored system) is operated over a period of time, the monitored system comprising an impedance matching network coupled between a radio frequency (RF) source and a plasma chamber. First values for a parameter of the monitored system are received, the first values comprising different values for the parameter over the time period of operation of the monitored system, and a learning model is trained using the first values for the parameter. A substrate is then placed in a plasma chamber of a controlled semiconductor manufacturing system (controlled system). A characteristic of the controlled system is determined using a current value of the parameter and the trained learning model. An action is then taken upon the controlled system to address the determined characteristic.

An embodiment method includes: forming a gate stack over a channel region; growing a source/drain region adjacent the channel region; depositing a first ILD layer over the source/drain region and the gate stack; forming a source/drain contact through the first ILD layer to physically contact the source/drain region; forming a gate contact through the first ILD layer to physically contact the gate stack; performing an etching process to partially expose a first sidewall and a second sidewall, the first sidewall being at a first interface of the source/drain contact and the first ILD layer, the second sidewall being at a second interface of the gate contact and the first ILD layer; forming a first conductive feature physically contacting the first sidewall and a first top surface of the source/drain contact; and forming a second conductive feature physically contacting the second sidewall and a second top surface of the gate contact.

A semiconductor arrangement is provided. The semiconductor arrangement includes a dielectric layer defining an opening, an adhesion layer in the opening, and a conductive layer in the opening over the adhesion layer. A material of the conductive layer is a same material as an adhesion material of the adhesion layer.

Embodiments disclosed herein include transistor devices and methods of making such devices. In an embodiment, the transistor device comprises a stack of semiconductor channels with a first source/drain region on a first end of the semiconductor channels and a second source/drain region on a second end of the semiconductor channels. In an embodiment, the first source/drain region and the second source/drain region have a top surface and a bottom surface. In an embodiment, the transistor device further comprises a first source/drain contact electrically coupled to the top surface of the first source/drain region, and a second source/drain contact electrically coupled to the bottom surface of the second source/drain region. In an embodiment, the second source/drain contact is separated from the second source/drain region by an interfacial layer.

The present disclosure describes a method for the fabrication of ruthenium conductive structures over cobalt conductive structures. In some embodiments, the method includes forming a first opening in a dielectric layer to expose a first cobalt contact and filling the first opening with ruthenium metal to form a ruthenium contact on the first cobalt contact. The method also includes forming a second opening in the dielectric layer to expose a second cobalt contact and a gate structure and filling the second opening with tungsten to form a tungsten contact on the second cobalt contact and the gate structure. Further, the method includes forming a copper conductive structure on the ruthenium contact and the tungsten contact, where the copper from the copper conductive structure is in contact with the ruthenium metal from the ruthenium contact.

Vapor deposition processes for forming thin films comprising molybdenum on a substrate are provide. In some embodiments the processes comprise a plurality of deposition cycles in which the substrate is separately contacted with a vapor phase molybdenum precursor comprising a molybdenum halide, a first reactant comprising CO, and a second reactant comprising H.sub.2. In some embodiments the thin film comprises MoC, Mo.sub.2C, or MoOC. In some embodiments the substrate is additionally contacted with a nitrogen reactant and a thin film comprising molybdenum, carbon and nitrogen is deposited, such as MoCN or MoOCN.

A method for forming a semiconductor device includes: a substrate is provided; a barrier layer is formed on an upper surface of the substrate, and a proportion of crystal orientation <111> in crystal orientations of the barrier layer is at least a preset value; and a metal material layer is formed on an upper surface of the barrier layer, crystal orientations of the metal material layer including a crystal orientation <111>.