To provide a means capable of suppressing the generation of gelation at the time of or after the addition of a silane coupling agent in the production of a cationically modified silica including modifying a silica raw material with a silane coupling agent. The present invention is a method for producing a cationically modified silica, including: mixing a silica raw material having a negative zeta potential with a silane coupling agent having an amino group or a quaternary cationic group; and reacting the silica raw material with the silane coupling agent to obtain a cationically modified silica, in which the cationically modified silica satisfies the following relational expression (1):
X<Yrelational expression (1) in the relational expression (1), X is a pH value at which an isoelectric point is shown in the cationically modified silica, and Y is a pH value of the cationically modified silica.

A polishing liquid containing: abrasive grains; a hydroxy acid; a polymer compound having at least one selected from the group consisting of a hydroxyl group and an amide group; and a liquid medium, in which a zeta potential of the abrasive grains is positive, and a weight average molecular weight of the polymer compound is 3000 or more.

Provided is a semiconductor device including a substrate, a plurality of memory cells, and at least one dummy gate structure. The substrate has a memory cell region and a dummy region. The memory cells are disposed on the substrate in the memory cell region. Each memory cell includes: adjacent two stack structures disposed on the substrate; two select gates respectively disposed outside the adjacent two stack structures; and an erase gate disposed between the adjacent two stack structures. The erase gate has a step between a topmost top surface and a lowermost top surface of the erase gate. The at least one dummy gate structure is disposed on the substrate in the dummy region.

According to an aspect of the present invention, there is provided a polishing liquid containing abrasive grains, a hydroxy acid, a polyol, at least one zwitterionic compound selected from the group consisting of an aminocarboxylic acid and an aminosulfonic acid, and a liquid medium, in which a zeta potential of the abrasive grains is positive, an isoelectric point of the aminocarboxylic acid is smaller than 7.0, and pKa of the aminosulfonic acid is larger than 0.

In a method of manufacturing a semiconductor device, a first layer having an opening is formed over a substrate. A second layer is formed over the first layer and the substrate. A photo resist pattern is formed over the second layer above the opening of the first layer. The photo resist pattern is reflowed by a thermal process. An etch-back operation is performed to planarize the second layer.

A semiconductor device includes etch stop films formed on the first gate electrode, the first source region, the first drain region, and the shallow trench isolation regions, respectively. First interlayer insulating films are formed on the etch stop film, respectively. Deep trenches are formed in the substrate between adjacent ones of the first interlayer insulating films to overlap the shallow trench isolation regions. Sidewall insulating films are formed in the deep trenches, respectively. A gap-fill insulating film is formed on the sidewall insulating film. A second interlayer insulating film is formed on the gap-fill insulating film. A top surface of the second interlayer insulating film is substantially planar and a bottom surface of the second interlayer insulating film is undulating.

A method for surface planarization of an object using a light source of a specific wavelength according to an embodiment includes: providing an object in a main chamber; injecting an etching gas into the main chamber; inputting the light source of a specific wavelength onto a surface of the object; and controlling a temperature of the object. According to the method, it is possible to minimize the side effects such as scratches or contamination of the sample that occur in a conventional chemical-mechanical planarization process. In addition, it is possible to allow precise planarization in nanometers (nm) and simultaneously perform planarization to a side surface of a device as well as a large-sized surface, thereby reducing cost and time required for the planarization process. Moreover, since the surface roughness and the electrical conductivity are improved, it is possible to increase the efficiency and output of the LED device.

A wafer is polished by performing a chemical reaction to change a property of a first portion of a material layer on the wafer using a first chemical substance. A first rinse is performed to remove the first chemical substance and retard the chemical reaction. A mechanical polishing process is then performed to remove the first portion of the material layer.

A dual interlayer dielectric material structure is located on a passivation dielectric material liner and entirely fills a gap located between each memory device stack of a plurality of memory device stacks. The dual interlayer dielectric material structure includes, from bottom to top, a first void free low-k interlayer dielectric (ILD) material and a second void free low-k ILD material.

An acid chemical mechanical polishing composition polishes silicon nitride over silicon dioxide and simultaneously inhibits damage to the silicon dioxide. The acid chemical mechanical polishing composition includes polyvinylpyrrolidone polymers, anionic functional colloidal silica abrasive particles and an amine carboxylic acid. The pH of the acid chemical mechanical polishing composition is 5 or less.