A semiconductor device comprises a semiconductor material extending through a stack of alternating levels of a conductive material and an insulative material, and a material comprising cerium oxide and at least another oxide adjacent to the semiconductor material. Related electronic systems and methods are also disclosed.

A process for controlling the heat generated during the manufacture an inhibited hydrofluoric acid aqueous composition comprising: hydrofluoric acid in solution; a weak base; and an alkanolamine;
said process comprising the steps of: providing a pre-determined amount of weak base; adding a pre-determined amount of said hydrofluoric acid to said weak base and obtaining a solution; adding said alkanolamine to the resulting solution of hydrofluoric acid and weak base; mixing until all components are dissolved;
wherein said alkanolamine and hydrofluoric acid are present in a molar ratio of at least 1:1.

The invention relates to compositions and methods for the selective wet etching of a surface of a microelectronic device that contains both silicon nitride (SiN) and polysilicon. An etching composition as described comprises phosphoric acid, certain polysilicon corrosion inhibitors, along with certain silanes. The combination of the two components was found to greatly improve the selectivity of the silicon nitride etching composition in the presence of polysilicon.

A method of processing a plurality of substrates includes immersing the plurality of substrates into a bath solution contained in a bath chamber; generating gas bubbles in the bath solution; projecting light from a light source toward the bath chamber; generating light sensor data by capturing light emanating off the bath chamber after interacting with the gas bubbles with a light sensor; and converting the light sensor data into a metric for the bath solution.

A package on a die having a low resistive substrate, wherein the package comprises an inductor on low-k dielectric and a capacitor on high-k dielectric. The stacked arrangement having different dielectric materials may provide an inductor having a high Q-factor while still having a high capacitance density. In addition, moving the inductor from the die to the package and fabricating the high density capacitor on the package reduces the silicon area required permitting smaller RF/analog blocks on the chip.

A method for manufacturing an electronic device includes locally implanting ionic species into a first region of a silicon nitride layer and into a first region of an electrically insulating layer located under the first region of the silicon nitride layer. A second region of the silicon nitride layer and a region of the electrically insulating layer located under the second region of the silicon nitride layer are protected from the implantation. The electrically insulating layer is disposed between a semi-conducting substrate and the silicon nitride layer. At least one trench is formed extending into the semi-conducting substrate through the silicon nitride layer and the electrically insulating layer. The trench separates the first region from the second region of the electrically insulating layer. The electrically insulating layer is selectively etched, and the etch rate of the electrically insulating layer in the first region is greater than the etch rate in the second region.

An upper surface of a plug (PL1) is formed so as to be higher than an upper surface of an interlayer insulating film (PIL) by forming the interlayer insulating film (PIL) on a semiconductor substrate (1S), completing a CMP method for forming the plug (PL1) inside the interlayer insulating film (PIL), and then, making the upper surface of the interlayer insulating film (PIL) to recede. In this manner, reliability of connection between the plug (PL1) and a wiring (W1) in a vertical direction can be ensured. Also, the wiring (W1) can be formed so as not to be embedded inside the interlayer insulating film (PIL), or a formed amount by the embedding can be reduced.

The present disclosure provides a semiconductor device and a fabrication method thereof. The semiconductor device includes a first nitride semiconductor layer, a second nitride semiconductor layer, a gate structure, a first spacer and a second spacer. The second nitride semiconductor layer is formed on the first nitride semiconductor layer and having a greater bandgap than that of the first nitride semiconductor layer. The gate structure is disposed on the second nitride semiconductor layer. The first spacer is disposed on the second nitride semiconductor layer. The in second spacer is disposed on the second nitride semiconductor layer and spaced apart from the first spacer by the gate structure. The bottom of the first spacer has a first width, the bottom of the second spacer has a second width, and the first width is different from the second width.

The present disclosure relates to a semiconductor device including a substrate and a pair of spacers on the substrate. Each spacer of the pair of spacers includes an upper portion having a first width and a lower portion under the upper portion and having a second width different from the first width. The semiconductor device further includes a gate structure between the pair of spacers. The gate structure has an upper gate length and a lower gate length that is different from the upper gate length.

A semiconductor processing liquid including hydrofluoric acid, and an organic solvent, in which the organic solvent contains a compound represented by the formula below in which X.sub.1 is a single bond or an alkylene group having 1 to 6 carbon atoms, in which an ether bond may be interposed, Y.sub.10 is one of —O—, —(C═O)—, —O—(C═O)—, and —(C═O)—O—, Y.sub.20 is one of —(C═O)—, —O—(C═O)—, and —(C═O)—O—, and Y.sub.11 and Y.sub.21 are each independently a single bond or an alkylene group having 1 to 6 carbon atoms in which an ether bond may be interposed, provided that, X.sub.1, Y.sub.11, and Y.sub.21 do not contain hydroxyl groups in structures thereof, and when X.sub.1 is a single bond, Y.sub.10 is not —O—)

H.sub.3C—Y.sub.11—Y.sub.10—X.sub.1—Y.sub.20—Y.sub.21—CH.sub.3  (1).