In one example, an electroplating system comprises a first bath reservoir, a second bath reservoir, a clamp, a first anode in the first bath reservoir, a second anode in the second bath reservoir, and a direct current power supply. The first bath reservoir contains a first electrolyte solution that includes an alkaline copper-complexed solution. The second bath reservoir contains a second electrolyte solution that includes an acidic copper plating solution. The direct current power supply generates a first direct current between the clamp and the first anode to electroplate a first copper layer on the cobalt layer of the wafer submerged in the first electrolyte solution. The direct current power supply then generates a second direct current between the clamp and the second anode to electroplate a second copper layer on the first copper layer of the wafer submerged in the second electrolyte solution.

A chemical mechanical polishing apparatus includes a rotatable platen to hold a polishing pad, a rotatable carrier to hold a substrate against a polishing surface of the polishing pad during a polishing process, a polishing liquid supply port to supply a polishing liquid to the polishing surface, a thermal control system including a movable nozzle to spray a medium onto the polishing surface to adjust a temperature of a zone on the polishing surface, an actuator to move the nozzle radially relative to an axis of rotation of the platen, and a controller configured to coordinate dispensing of the medium from the nozzle with motion of the nozzle across the polishing surface.

A substrate cleaning system includes a cleaner module to clean a substrate after polishing of the substrate, a drier module to dry the substrate after cleaning by the cleaner module, a substrate support movable along a first axis from a first position in the drier module to a second position outside the drier module, and an in-line metrology station including a line-scan camera positioned to scan the substrate as the substrate is held by the substrate support and the substrate support is between the first position to the second position. The first axis is substantially parallel to a face of the substrate as held in by the substrate support.

A method of processing a substrate that includes: loading the substrate in a processing system, the substrate including a metal having a metal surface and a first dielectric material having a dielectric material surface, the metal surface and the dielectric material surface being at the same level; etching the metal to form a recessed metal surface below the dielectric material surface; selectively forming a self-assembled monolayer (SAM) on the recessed metal surface using a spin-on process; and depositing a dielectric film including a second dielectric material on the dielectric material surface.

A chemical mechanical polishing apparatus includes a platen to support a polishing pad, a carrier head to hold a substrate against a polishing surface of the polishing pad, a motor to generate relative motion between the platen and the carrier head so as to polish an overlying layer on the substrate, an in-situ vibration monitoring system including a light source to emit a light beam and a sensor that receives a reflection of the light beam from a reflective surface of the polishing pad, and a controller configured to detect exposure of an underlying layer due to the polishing of the substrate based on measurements from the sensor of the in-situ pad vibration monitoring system.

Representative implementations of techniques and methods include chemical mechanical polishing for hybrid bonding. The disclosed methods include depositing and patterning a dielectric layer on a substrate to form openings in the dielectric layer, depositing a barrier layer over the dielectric layer and within a first portion of the openings, and depositing a conductive structure over the barrier layer and within a second portion of the openings not occupied by the barrier layer, at least a portion of the conductive structure in the second portion of the openings coupled or contacting electrical circuitry within the substrate. Additionally, the conductive structure is polished to reveal portions of the barrier layer deposited over the dielectric layer and not in the second portion of the openings. Further, the barrier layer is polished with a selective polish to reveal a bonding surface on or at the dielectric layer.

The present invention provides Chemical Mechanical Planarization Polishing (CMP) compositions for Shallow Trench Isolation (STI) applications. The CMP compositions contain ceria coated inorganic metal oxide particles as abrasives, such as ceria-coated silica particles; chemical additive selected from the first group of non-ionic organic molecules multi hydroxyl functional groups in the same molecule; chemical additives selected from the second group of aromatic organic molecules with sulfonic acid group or sulfonate salt functional groups and combinations thereof; water soluble solvent; and optionally biocide and pH adjuster; wherein the composition has a pH of 2 to 12, preferably 3 to 10, and more preferably 4 to 9.

Provided herein are polishing pads in which microcapsules that include a polymer material and are dispersed, as well as methods of making and using the same. Such microcapsules are configured to break open (e.g., when the polishing pad is damaged during the dressing process), which releases the polymer material. When contacted with ultraviolet light the polymer material at least partially cures, healing the damage to the polishing pad. Such polishing pads have a longer lifetime and a more stable remove rate when compared to standard polishing pads.

A device includes a diode that includes a first group III-nitride (III-N) material and a transistor adjacent to the diode, where the transistor includes the first III-N material. The diode includes a second III-N material, a third III-N material between the first III-N material and the second III-N material, a first terminal including a metal in contact with the third III-N material, a second terminal coupled to the first terminal through the first group III-N material. The device further includes a transistor structure, adjacent to the diode structure. The transistor structure includes the first, second, and third III-N materials, a source and drain, a gate electrode and a gate dielectric between the gate electrode and each of the first, second and third III-N materials.

A semiconductor device manufacturing method is capable of manufacturing a semiconductor device with improved reliability, by simplifying a chemical mechanical polishing (CMP) process and minimizing a thickness distribution of a dummy gate during the CMP process. The semiconductor device manufacturing method includes forming, on a substrate, dummy gate structures extending in a first direction and spaced apart from each other in a second direction perpendicular to the first direction, each dummy gate structure including a dummy gate and a mask pattern on an upper surface of the dummy gate; forming an interlayer insulating layer covering the dummy gate structures; and performing the single slurry CMP process of removing some of the interlayer insulating layer and the dummy gate structures through the single slurry CMP process and exposing the upper surface of the dummy gate.