Patent classifications
H01L21/32131
SEMICONDUCTOR DEVICE HAVING SYMMETRIC CONDUCTIVE INTERCONNECTION PATTERNS
A method for fabricating a semiconductor device may include forming a stopper layer; forming an intermediate pattern material layer over the stopper layer; forming a plurality of first preliminary intermediate patterns by patterning the intermediate pattern material layer; forming a plurality of second preliminary intermediate patterns by shrinking the first preliminary intermediate patterns; forming a conductive material layer to cover the second preliminary intermediate patterns; forming a plurality of preliminary conductive interconnection patterns by patterning the conductive material layer; forming a filling layer between the preliminary conductive interconnection patterns; and forming a plurality of intermediate patterns, a plurality of conductive interconnection patterns and a plurality of filling patterns by removing top portions of the filling layer, the preliminary conductive interconnection patterns and the second preliminary intermediate patterns.
Techniques for forming angled structures
A method of forming angled structures in a substrate. The method may include the operation of forming a mask by etching angled mask features in a mask layer, disposed on a substrate base of the substrate, the angled mask features having sidewalls, oriented at a non-zero angle of inclination with respect to perpendicular to a main surface of the substrate. The method may include etching the substrate with the mask in place, the etching comprising directing ions having trajectories arranged at a non-zero angle of incidence with respect to a perpendicular to the main surface.
Partial backside metal removal singulation system and related methods
Implementations of methods of singulating a plurality of die included in a substrate may include forming a plurality of die on a first side of a substrate, forming a backside metal layer on a second side of a substrate, forming a groove only partially through a thickness of the backside metal layer, and singulating the plurality of die included in the substrate through removing backmetal material in the die street and removing substrate material in the die street. The groove may be located in a die street of the substrate.
Backside metal removal die singulation systems and related methods
Implementations of methods of singulating a plurality of die included in a substrate may include forming a groove through a backside metal layer through laser ablating a backside metal layer at a die street of a substrate and singulating a plurality of die included in the substrate through removing substrate material of the substrate in the die street.
Low Dimensional Material Device and Method
In an embodiment, a device includes: a dielectric fin on a substrate; a low-dimensional layer on the dielectric fin, the low-dimensional layer including a source/drain region and a channel region; a source/drain contact on the source/drain region; and a gate structure on the channel region adjacent the source/drain contact, the gate structure having a first width at a top of the gate structure, a second width at a middle of the gate structure, and a third width at a bottom of the gate structure, the second width being less than each of the first width and the third width.
SUBSTRATE TREATMENT METHOD AND SUBSTRATE TREATMENT SYSTEM
A substrate treatment method includes: generating, for each of layers constituting a stacked film on a substrate, a captured image of the substrate after a treatment regarding a relevant layer; and acquiring information indicating a feature amount estimated based on the captured image for each of a plurality of layers including an outermost layer of the stacked film on the substrate.
METHOD FOR REMOVING RE-SPUTTERED MATERIAL FROM PATTERNED SIDEWALLS
The present invention provides a method for removing re-sputtered material on a substrate. A process chamber having a plasma source and a substrate support is provided along with the substrate having an upper surface and a lower surface. A masking material having a patterned sidewall is patterned onto the upper surface of the substrate along with a sacrificial layer between the upper surface of the substrate and the masking material. The lower surface of the substrate is placed onto the substrate support. A plasma is generated using the plasma source. The substrate is processed on the substrate support using the generated plasma. The sacrificial layer is removed after the processing of the substrate.
PROCESS OF FORMING HIGH ELECTRON MOBILITY TRANSISTOR (HEMT) AND HEMT FORMED BY THE SAME
A process of forming a field effect transistor (FET) of a type of high electron mobility transistor (HEMT) reducing damages caused in a semiconductor layer is disclosed. The process carries out steps of: (a) depositing an insulating film on a semiconductor stack; (b) depositing a conductive film on the insulating film; (c) forming an opening in the conductive film and the insulating film by a dry-etching using ions of reactive gas to expose a surface of the semiconductor stack; and (d) forming a gate electrode to be in contact with the surface of the semiconductor stack through the opening, the gate electrode filling the opening in the conductive film and the insulating film.
Metal insulator metal capacitor with extended capacitor plates
A method for fabricating a capacitor structure is described. The method for metal insulator metal capacitor in an integrated circuit device includes forming a first dielectric layer on a substrate. The first dielectric layer has a linear trench feature in which the capacitor is disposed. A bottom capacitor plate is formed in a lower portion of the trench. The bottom capacitor plate has an extended top face so that the extended top face extends upwards in a central region of the bottom capacitor plate metal relative to side regions. A high-k dielectric layer is formed over the extended top face of the bottom capacitor plate. A top capacitor plate is formed in a top, remainder portion of the trench on top of the high-k dielectric layer.
PLASMA DIE SINGULATION SYSTEMS AND RELATED METHODS
Implementations of methods of singulating a plurality of die included in a substrate may include exposing a substrate material of a substrate in a die street through removing a metal layer in the die street coupled to the substrate, wherein only a portion of the substrate material in the die street is removed, and singulating a plurality of die included in the substrate through plasma etching the exposed substrate material of the substrate in the die street.