Semiconductor structure and fabrication methods are provided. The semiconductor structure includes a first wafer having a first metal layer therein and having a first material layer thereon, and a second wafer having a second metal layer therein and having a second material layer thereon. An alignment process and a bonding process are preformed between the first wafer and the second wafer, such that the first material layer and the second material layer are aligned and in contact with one another to provide a first alignment accuracy between the first metal layer and second metal layer. A heating process is performed on the first material layer and the second material layer to melt the first material layer and the second material layer to provide a second alignment accuracy between the first metal layer and second metal layer. The second alignment accuracy is greater than the first alignment accuracy.

Disclosed herein are compositions for removing silicone resins and methods of thinning a substrate by using the same, as well as related methods, apparatus and systems for facilitating the removal of silicone resins. More particularly, disclosed herein are compositions for removing silicone resins, the compositions including a heterocyclic solvent and an alkyl ammonium fluoride salt represented by a formula, (R).sub.4N.sup.+F.sup., wherein R is a C1 to C4 linear alkyl group. Silicone resins may be effectively removed by using the compositions since the compositions exhibit an excellent decomposition rate with respect to the silicone resins that remain on a semiconductor substrate in a process of backside grinding of the semiconductor substrate, backside electrode formation, or the like.

Disclosed herein are compositions for removing silicone resins and methods of thinning a substrate by using the same, as well as related methods, apparatus and systems for facilitating the removal of silicone resins. More particularly, disclosed herein are compositions for removing silicone resins, the compositions including a heterocyclic solvent and an alkyl ammonium fluoride salt represented by a formula, (R).sub.4N.sup.+F.sup., wherein R is a C1 to C4 linear alkyl group. Silicone resins may be effectively removed by using the compositions since the compositions exhibit an excellent decomposition rate with respect to the silicone resins that remain on a semiconductor substrate in a process of backside grinding of the semiconductor substrate, backside electrode formation, or the like.

Various embodiments include methods of forming interconnect structures, and the structures formed by such methods. In one embodiment, an interconnect structure can include: a photosensitive polyimide (PSPI) layer including a pedestal portion; a controlled collapse chip connection (C4) bump overlying the pedestal portion of the PSPI layer; a solder overlying the C4 bump and contacting a side of the C4 bump; and an underfill layer abutting the pedestal portion of the PSPI and the C4 bump, wherein the underfill layer and the solder form a first interface separated from the PSPI pedestal.

Various embodiments include methods of forming interconnect structures, and the structures formed by such methods. In one embodiment, a method can include: providing a precursor interconnect structure having: a photosensitive polyimide (PSPI) layer; a controlled collapse chip connection (C4) bump overlying the PSPI layer; and a solder overlying the C4 bump and contacting a side of the C4 bump. The method can further include recessing a portion of the PSPI layer adjacent to the C4 bump to form a PSPI pedestal under the C4 bump. The method can additionally include forming an underfill abutting the PSPI pedestal and the C4 bump, wherein the underfill and the solder form an interface separated from the PSPI pedestal.

Provided are a semiconductor chip and a semiconductor package capable of obtaining stability and reliability through a connection structure using a through-silicon-via (TSV). The semiconductor chip includes a semiconductor substrate and a through-silicon-via (TSV) structure penetrating through the semiconductor substrate. A connection pad includes a foundation base disposed on a lower surface of the semiconductor substrate and connected to the TSV structure. A protruding portion protrudes from the foundation base and extend to an inside of a first groove formed in a lower surface of the semiconductor substrate.

Provided are a semiconductor chip and a semiconductor package capable of obtaining stability and reliability through a connection structure using a through-silicon-via (TSV). The semiconductor chip includes a semiconductor substrate and a through-silicon-via (TSV) structure penetrating through the semiconductor substrate. A connection pad includes a foundation base disposed on a lower surface of the semiconductor substrate and connected to the TSV structure. A protruding portion protrudes from the foundation base and extend to an inside of a first groove formed in a lower surface of the semiconductor substrate.