Three-dimensional integrated circuit structures are disclosed. A three-dimensional integrated circuit structure includes a first die, a second die and a device-free die. The first die includes a first device. The second die includes a second device and is bonded to the first die. The device-free die is located aside the second die and is bonded to the first die. The device-free die includes a conductive feature electrically connected to the first die and the second die.

A forming method of a semiconductor package includes the following steps. A first die is provided. The first die includes a first bonding structure and a first seal ring, the first bonding structure is formed at a first side of the first die, a first portion of the first seal ring is formed between the first side and the first bonding structure, and a width of the first portion is smaller than a width of a second portion of the first seal ring. A second die is provided. The second die includes a second bonding structure. The first die and the second die are bonded onto an integrated circuit through the first bonding structure and the second bonding structure.

A forming method of a semiconductor package includes the following steps. A first die is provided. The first die includes a first bonding structure and a first seal ring, the first bonding structure is formed at a first side of the first die, a first portion of the first seal ring is formed between the first side and the first bonding structure, and a width of the first portion is smaller than a width of a second portion of the first seal ring. A second die is provided. The second die includes a second bonding structure. The first die and the second die are bonded onto an integrated circuit through the first bonding structure and the second bonding structure.

A bonded assembly of a first semiconductor die and a second semiconductor die includes first and second semiconductor dies. The first semiconductor die includes first semiconductor devices, first metal interconnect structures embedded in first dielectric material layers, and first metal bonding pads laterally surrounded by a semiconductor material layer. The second semiconductor die includes second semiconductor devices, second metal interconnect structures embedded in second dielectric material layers, and second metal bonding pads that include primary metal bonding pads and auxiliary metal bonding pads. The auxiliary metal bonding pads are bonded to the semiconductor material layer through metal-semiconductor compound portions formed by reaction of surface portions of the semiconductor material layer and an auxiliary metal bonding pad. The primary metal bonding pads are bonded to the first metal bonding pads by metal-to-metal bonding.

A method includes bonding a second package component to a first package component, bonding a third package component to the first package component, attaching a dummy die to the first package component, encapsulating the second package component, the third package component, and the dummy die in an encapsulant, and performing a planarization process to level a top surface of the second package component with a top surface of the encapsulant. After the planarization process, an upper portion of the encapsulant overlaps the dummy die. The dummy die is sawed-through to separate the dummy die into a first dummy die portion and a second dummy die portion. The upper portion of the encapsulant is also sawed through.

A method includes bonding a second package component to a first package component, bonding a third package component to the first package component, attaching a dummy die to the first package component, encapsulating the second package component, the third package component, and the dummy die in an encapsulant, and performing a planarization process to level a top surface of the second package component with a top surface of the encapsulant. After the planarization process, an upper portion of the encapsulant overlaps the dummy die. The dummy die is sawed-through to separate the dummy die into a first dummy die portion and a second dummy die portion. The upper portion of the encapsulant is also sawed through.

A semiconductor device includes a semiconductor element, a first conductive member, a second conductive member, a connecting member, and a metal plate. The semiconductor element has an element obverse surface and an element reverse surface that are spaced apart from each other in a thickness direction. An obverse surface electrode is provided on the element obverse surface. The first conductive member faces the element reverse surface and is bonded to the semiconductor element. The first conductive member and the second conductive member are spaced apart from each other. The connecting member electrically connects the obverse surface electrode and the second conductive member. The metal plate is interposed between the obverse surface electrode and the connecting member in the thickness direction. The obverse surface electrode and the metal plate are bonded to each other by solid-phase diffusion.

The present disclosure relates to a method for forming a semiconductor device structure. The method includes forming a first semiconductor die and forming a second semiconductor die. The first semiconductor die includes a first metal layer, a first conductive via over the first metal layer, and a first conductive polymer liner surrounding the first conductive via. The second semiconductor die includes a second metal layer, a second conductive via over the second metal layer, and a second conductive polymer liner surrounding the second conductive via. The method also includes forming a conductive structure electrically connecting the first metal layer and the second metal layer by bonding the second semiconductor die to the first semiconductor die. The conductive structure is formed by the first conductive via, the first conductive polymer liner, the second conductive via, and the second conductive polymer liner.

The present disclosure relates to a method for forming a semiconductor device structure. The method includes forming a first semiconductor die and forming a second semiconductor die. The first semiconductor die includes a first metal layer, a first conductive via over the first metal layer, and a first conductive polymer liner surrounding the first conductive via. The second semiconductor die includes a second metal layer, a second conductive via over the second metal layer, and a second conductive polymer liner surrounding the second conductive via. The method also includes forming a conductive structure electrically connecting the first metal layer and the second metal layer by bonding the second semiconductor die to the first semiconductor die. The conductive structure is formed by the first conductive via, the first conductive polymer liner, the second conductive via, and the second conductive polymer liner.

There is provided semiconductor devices and methods of forming the same, the semiconductor devices including: a first semiconductor element having a first electrode; a second semiconductor element having a second electrode; a Sn-based micro-solder bump formed on the second electrode; and a concave bump pad including the first electrode opposite to the micro-solder bump, where the first electrode is connected to the second electrode via the micro-solder bump and the concave bump pad.