A light emitting diode apparatus includes a substrate, a first conductive type semiconductor layer, a second conductive type semiconductor layer, a mesa, a lower insulating layer, a first pad and a second pad. The substrate has a first surface and a second surface opposite to the first surface. The first conductivity type semiconductor layer is disposed on the first surface of the substrate. The mesa is disposed on the first conductive semiconductor layer and has an active layer and the second conductive semiconductor layer. A peripheral edge of the first conductive semiconductor layer is exposed. The lower insulating layer covers the mesa and the first conductive semiconductor layer and has a plurality of first openings exposing the first conductive semiconductor layer along a peripheral edge of the substrate.

An electronic device, an electronic module comprising the electronic device and methods for fabricating the same are disclosed. In one example, the electronic device includes a semiconductor substrate and a metal stack disposed on the semiconductor substrate, wherein the metal stack comprises a first layer, wherein the first layer comprises NiSi.

An electronic device, an electronic module comprising the electronic device and methods for fabricating the same are disclosed. In one example, the electronic device includes a semiconductor substrate and a metal stack disposed on the semiconductor substrate, wherein the metal stack comprises a first layer, wherein the first layer comprises NiSi.

A device has a first stack of thin films, the first stack of thin films having a first opposing surface and a first connection surface, wherein the first connection surface contacts a first superconducting region; a second stack of thin films, the second stack of thin films having a second opposing surface and a second connection surface, wherein the second connection surface contacts a second superconducting region; and a superconducting bump bond electrically connecting the first and second opposing surfaces, the superconducting bump bond maintaining a low ohmic electrical contact between the first and second opposing surfaces at temperatures below 100 degrees Kelvin, wherein at least one of the first or second superconducting regions comprise material with a melting point of at least 700 degrees Celsius.

Metal-to-metal adhesion joints are described as a manner to hold down micro devices to a carrier substrate within the context of a micro device transfer manufacturing process. In accordance with embodiments, the metal-to-metal adhesion joints must be broken in order to pick up the micro devices from a carrier substrate, resulting in micro devices with nubs protruding from bottom contacts of the micro devices. Once integrated, the micro devices are bonded to a receiving substrate, the nubs may be embedded in a metallic joint, or alternatively be diffused within the metallic joint as interstitial metallic material that is embedded within the metallic joint.

Metal-to-metal adhesion joints are described as a manner to hold down micro devices to a carrier substrate within the context of a micro device transfer manufacturing process. In accordance with embodiments, the metal-to-metal adhesion joints must be broken in order to pick up the micro devices from a carrier substrate, resulting in micro devices with nubs protruding from bottom contacts of the micro devices. Once integrated, the micro devices are bonded to a receiving substrate, the nubs may be embedded in a metallic joint, or alternatively be diffused within the metallic joint as interstitial metallic material that is embedded within the metallic joint.

A technique relates to a device. First thin films are characterized by having a first opposing surface and a first connection surface in which the first connection surface is in physical contact with a first superconducting region. Second thin films are characterized by having a second opposing surface and a second connection surface in which the first and second opposing surfaces are opposite one another. The second connection surface is in physical contact with a second superconducting region. A solder material electrically connects the first and second opposing surfaces, and the solder material is characterized by maintaining a low ohmic electrical contact between the first and second opposing surfaces at temperatures below 100 degrees Kelvin. The first and second superconducting regions are formed of materials that have a melting point of at least 700 degrees Celsius.

An optical package structure includes a substrate having a first surface, an interposer bonded to the first surface through a bonding layer, the interposer having a first area from a top view perspective, and an optical device on the interposer, having a second area from the top view perspective, the first area being greater than the second area. A method for manufacturing the optical package structure is also provided.

An optical package structure includes a substrate having a first surface, an interposer bonded to the first surface through a bonding layer, the interposer having a first area from a top view perspective, and an optical device on the interposer, having a second area from the top view perspective, the first area being greater than the second area. A method for manufacturing the optical package structure is also provided.

A microelectronic device includes a metal layer on a first dielectric layer. An etch stop layer is disposed over the metal layer and on the dielectric layer directly adjacent to the metal layer. The etch stop layer includes a metal oxide, and is less than 10 nanometers thick. A second dielectric layer is disposed over the etch stop layer. The second dielectric layer is removed from an etched region which extends down to the etch stop layer. The etched region extends at least partially over the metal layer. In one version of the microelectronic device, the etch stop layer may extend over the metal layer in the etched region. In another version, the etch stop layer may be removed in the etched region. The microelectronic device is formed by etching the second dielectric layer using a plasma etch process, stopping on the etch stop layer.