A technique relates to a structure. An under-bump-metallization (UBM) structure includes a first region and a second region. The first and second regions are laterally positioned in the UBM structure. The first region includes a superconducting material. A substrate opposes the UBM structure. A superconducting solder material joins the first region to the substrate and the second region to the substrate.

A semiconductor die includes a last metallization layer above a semiconductor substrate, a bond pad above the last metallization layer, a passivation layer covering part of the bond pad and having an opening that defines a contact area of the bond pad, an insulating region separating the bond pad from the last metallization layer at least in an area corresponding to the contact area of the bond pad, and an electrically conductive interconnection structure that extends from the bond pad to the upper metallization layer outside the contact area of the bond pad. Corresponding methods of manufacture are also provided.

A semiconductor die includes a last metallization layer above a semiconductor substrate, a bond pad above the last metallization layer, a passivation layer covering part of the bond pad and having an opening that defines a contact area of the bond pad, an insulating region separating the bond pad from the last metallization layer at least in an area corresponding to the contact area of the bond pad, and an electrically conductive interconnection structure that extends from the bond pad to the upper metallization layer outside the contact area of the bond pad. Corresponding methods of manufacture are also provided.

An optical package structure includes a substrate having a first surface, an interposer bonded to the first surface through a bonding layer, the interposer having a first area from a top view perspective, and an optical device on the interposer, having a second area from the top view perspective, the first area being greater than the second area. A method for manufacturing the optical package structure is also provided.

An optical package structure includes a substrate having a first surface, an interposer bonded to the first surface through a bonding layer, the interposer having a first area from a top view perspective, and an optical device on the interposer, having a second area from the top view perspective, the first area being greater than the second area. A method for manufacturing the optical package structure is also provided.

A cryogenic electronic package includes at least two superconducting and/or conventional metal semiconductor structures. Each of the semiconductor structures includes a substrate and a superconducting trace. Additionally, each of the semiconductor structures includes a passivation layer and one or more under bump metal (UBM) structures. The cryogenic electronic package also includes one or more superconducting and/or conventional metal interconnect structures disposed between selected ones of the at least two superconducting semiconductor structures. The interconnect structures are electrically coupled to respective ones of the UBM structures of the semiconductor structures to form one or more electrical connections between the semiconductor structures. A method of fabricating a cryogenic electronic package is also provided.

A cryogenic electronic package includes at least two superconducting and/or conventional metal semiconductor structures. Each of the semiconductor structures includes a substrate and a superconducting trace. Additionally, each of the semiconductor structures includes a passivation layer and one or more under bump metal (UBM) structures. The cryogenic electronic package also includes one or more superconducting and/or conventional metal interconnect structures disposed between selected ones of the at least two superconducting semiconductor structures. The interconnect structures are electrically coupled to respective ones of the UBM structures of the semiconductor structures to form one or more electrical connections between the semiconductor structures. A method of fabricating a cryogenic electronic package is also provided.

A semiconductor die includes a last metallization layer above a semiconductor substrate, a bond pad above the last metallization layer, a passivation layer covering part of the bond pad and having an opening that defines a contact area of the bond pad, an insulating region separating the bond pad from the last metallization layer at least in an area corresponding to the contact area of the bond pad, and an electrically conductive interconnection structure that extends from the bond pad to the upper metallization layer outside the contact area of the bond pad. Corresponding methods of manufacture are also provided.

A semiconductor die includes a last metallization layer above a semiconductor substrate, a bond pad above the last metallization layer, a passivation layer covering part of the bond pad and having an opening that defines a contact area of the bond pad, an insulating region separating the bond pad from the last metallization layer at least in an area corresponding to the contact area of the bond pad, and an electrically conductive interconnection structure that extends from the bond pad to the upper metallization layer outside the contact area of the bond pad. Corresponding methods of manufacture are also provided.

A method of removing a substrate, comprising: forming a growth restrict mask with a plurality of striped opening areas directly or indirectly upon a GaN-based substrate; and growing a plurality of semiconductor layers upon the GaN-based substrate using the growth restrict mask, such that the growth extends in a direction parallel to the striped opening areas of the growth restrict mask, and growth is stopped before the semiconductor layers coalesce, thereby resulting in island-like semiconductor layers. A device is processed for each of the island-like semiconductor layers. Etching is performed until at least a part of the growth restrict mask is exposed. The devices are then bonded to a support substrate. The GaN-based substrate is removed from the devices by a wet etching technique that at least partially dissolves the growth restrict mask. The GaN substrate that is removed then can be recycled.