A substrate includes a base substrate, and a pad at one side of the base substrate, wherein the pad comprises: a first conductive pattern on the base substrate, an insulating layer including a plurality of contact holes exposing a portion of the first conductive pattern, and second conductive patterns separately on the insulating layer and connected to the first conductive pattern through the plurality of contact holes, wherein side surfaces of the second conductive patterns are exposed.

An interposer includes element mounting sections and terminal sections directly and partly formed on a surface of an aluminum film having the predetermined pattern. Each of the element mounting sections and the terminal sections has a laminated structure of an Ni film, an Pd film and an Au film. The interposer is formed with an AuSn layer on a predetermined region of a surface of each Au film in the element mounting sections. The interposer includes a protective film having optical permeability that directly covers a region of the surface of the aluminum film, which is out of contact with the element mounting sections and the terminal sections.

An interposer includes element mounting sections and terminal sections directly and partly formed on a surface of an aluminum film having the predetermined pattern. Each of the element mounting sections and the terminal sections has a laminated structure of an Ni film, an Pd film and an Au film. The interposer is formed with an AuSn layer on a predetermined region of a surface of each Au film in the element mounting sections. The interposer includes a protective film having optical permeability that directly covers a region of the surface of the aluminum film, which is out of contact with the element mounting sections and the terminal sections.

A semiconductor light-emitting device includes a light-emitting structure including a first semiconductor layer, an active layer and a second semiconductor layer sequentially stacked. A connection electrode is positioned above the light-emitting structure. The connection electrode includes a connection metal layer electrically connected to at least one of the first and second semiconductor layers. A UBM pattern is on the connection electrode. A connection terminal is on the UBM pattern. The connection metal layer includes a first metal element. A heat conductivity of the first metal element is higher than that of gold (Au). The connection terminal includes a second metal element. A first reactivity of the first metal element with the second metal element is lower than a second reactivity of gold (Au) with the second metal element.

A semiconductor light-emitting device includes a light-emitting structure including a first semiconductor layer, an active layer and a second semiconductor layer sequentially stacked. A connection electrode is positioned above the light-emitting structure. The connection electrode includes a connection metal layer electrically connected to at least one of the first and second semiconductor layers. A UBM pattern is on the connection electrode. A connection terminal is on the UBM pattern. The connection metal layer includes a first metal element. A heat conductivity of the first metal element is higher than that of gold (Au). The connection terminal includes a second metal element. A first reactivity of the first metal element with the second metal element is lower than a second reactivity of gold (Au) with the second metal element.

Airtightness of a hollow portion is maintained, and yield and durability are improved. A semiconductor device 1 includes a device substrate 2, a semiconductor circuit 3, a sealing frame 7, a cap substrate 8, via portions 10, electrodes 11, 12 and 13, and a bump portion 14 or the like. A hollow portion 9 in which the semiconductor circuit 3 is housed in an airtight state is provided between the device substrate 2 and the cap substrate 8. The bump portion 14 connects all the via portions 10 and the cap substrate 8. Thus, the via portions 10 can be reinforced using the bump portion 14A.

Airtightness of a hollow portion is maintained, and yield and durability are improved. A semiconductor device 1 includes a device substrate 2, a semiconductor circuit 3, a sealing frame 7, a cap substrate 8, via portions 10, electrodes 11, 12 and 13, and a bump portion 14 or the like. A hollow portion 9 in which the semiconductor circuit 3 is housed in an airtight state is provided between the device substrate 2 and the cap substrate 8. The bump portion 14 connects all the via portions 10 and the cap substrate 8. Thus, the via portions 10 can be reinforced using the bump portion 14A.

A semiconductor device includes a semiconductor layer, a first conductor film, a second conductor film, and a first protective film. The semiconductor layer has a semiconductor element. The first conductor film is formed on an upper surface of the semiconductor layer and is electrically connected to the semiconductor element. The second conductor film is formed on an outer side surface of the semiconductor layer and is electrically connected to the semiconductor element. The first protective film is formed on the first conductor film and has an opening to expose the first conductor film. A height from the upper surface of the semiconductor layer to an upper surface of the second conductor film is equal to or smaller than a height from the upper surface of the semiconductor layer to an upper surface of the first conductor film.

A semiconductor device includes a semiconductor layer, a first conductor film, a second conductor film, and a first protective film. The semiconductor layer has a semiconductor element. The first conductor film is formed on an upper surface of the semiconductor layer and is electrically connected to the semiconductor element. The second conductor film is formed on an outer side surface of the semiconductor layer and is electrically connected to the semiconductor element. The first protective film is formed on the first conductor film and has an opening to expose the first conductor film. A height from the upper surface of the semiconductor layer to an upper surface of the second conductor film is equal to or smaller than a height from the upper surface of the semiconductor layer to an upper surface of the first conductor film.

A semiconductor module can comprise a fully molded base portion comprising a planar surface that further comprises a semiconductor die comprising contact pads, conductive pillars coupled to the contact pads and extending to the planar surface, and an encapsulant material disposed over the active surface, four side surfaces, and around the conductive pillars, wherein ends of the conductive pillars are exposed from the encapsulant material at the planar surface of the fully molded base portion. A build-up interconnect structure comprising a routing layer can be disposed over the fully molded base portion. A photo-imageable solder mask material can be disposed over the routing layer and comprise openings to form surface mount device (SMD) land pads electrically coupled to the semiconductor die and the conductive pillars. A SMD component can be electrically coupled to the SMD land pads with surface mount technology (SMT).