Patent classifications
H01L2224/05169
Method of manufacturing semiconductor device
A method of manufacturing a semiconductor device that includes: preparing a pair of substrates that respectively include a device structure on one primary surface or another primary surface thereof; stacking the substrates so that said one primary surfaces face each other, exposing said another surfaces to the outside, and fixing entire peripheral outer edges of the substrates that have been stacked to each other; and thereafter, plating said exposed another primary surfaces of the stacked and fixed substrates.
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR DEVICE
Reliability of a semiconductor device is improved. A slope is provided on a side face of an interconnection trench in sectional view in an interconnection width direction of a redistribution layer. The maximum opening width of the interconnection trench in the interconnection width direction is larger than the maximum interconnection width of the redistribution layer in the interconnection width direction, and the interconnection trench is provided so as to encapsulate the redistribution layer in plan view.
System and method for dual-region singulation
A method for semiconductor fabrication includes forming a first array of semiconductor circuitry and a second array of semiconductor circuitry separated by a singulation region and a contact region. The method also includes forming a first array of process control monitoring structures within the singulation region of a substrate. The method also includes forming a first array of contact pads disposed in the contact region. The method also includes forming electrical connections between the first array of process control monitoring structures and the first array of contact pads, wherein all external electrical connections to the first array of process control monitoring structures are made through the first array of contact pads.
Multiple bond via arrays of different wire heights on a same substrate
Apparatuses relating generally to a substrate are disclosed. In such an apparatus, first wire bond wires (first wires) extend from a surface of the substrate. Second wire bond wires (second wires) extend from the surface of the substrate. The first wires and the second wires are external to the substrate. The first wires are disposed at least partially within the second wires. The first wires are of a first height. The second wires are of a second height greater than the first height for coupling of at least one electronic component to the first wires at least partially disposed within the second wires.
Multiple bond via arrays of different wire heights on a same substrate
Apparatuses relating generally to a substrate are disclosed. In such an apparatus, first wire bond wires (first wires) extend from a surface of the substrate. Second wire bond wires (second wires) extend from the surface of the substrate. The first wires and the second wires are external to the substrate. The first wires are disposed at least partially within the second wires. The first wires are of a first height. The second wires are of a second height greater than the first height for coupling of at least one electronic component to the first wires at least partially disposed within the second wires.
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THEREOF
There is provided semiconductor devices and methods of forming the same, the semiconductor devices including: a first semiconductor element having a first electrode; a second semiconductor element having a second electrode; a Sn-based micro-solder bump formed on the second electrode; and a concave bump pad including the first electrode opposite to the micro-solder bump, where the first electrode is connected to the second electrode via the micro-solder bump and the concave bump pad.
SEMICONDUCTOR DEVICE AND ITS MANUFACTURING METHOD
A semiconductor device includes an opening and a redistribution layer gutter which are formed integrally in a polyimide resin film of a single layer. A redistribution layer is formed in the polyimide resin film of a single layer. A wiring material (silver) including the redistribution layer can be inhibited from migrating.
Electrical barrier layers
An electrical connection structure includes a variable-composition nickel alloy layer with a minor constituent selected from a group consisting of boron, carbon, phosphorus, and tungsten, wherein at least over a portion of a conductive substrate, the concentration of the minor constituent decreases throughout the variable-composition nickel alloy layer in a direction from the bottom surface of the variable-composition nickel alloy layer to the top surface of the variable-composition nickel alloy layer.
SEMICONDUCTOR CHIP AND SEMICONDUCTOR PACKAGE HAVING THE SAME
Provided are a semiconductor chip and a semiconductor package capable of obtaining stability and reliability through a connection structure using a through-silicon-via (TSV). The semiconductor chip includes a semiconductor substrate and a through-silicon-via (TSV) structure penetrating through the semiconductor substrate. A connection pad includes a foundation base disposed on a lower surface of the semiconductor substrate and connected to the TSV structure. A protruding portion protrudes from the foundation base and extend to an inside of a first groove formed in a lower surface of the semiconductor substrate.
SEMICONDUCTOR CHIP AND SEMICONDUCTOR PACKAGE HAVING THE SAME
Provided are a semiconductor chip and a semiconductor package capable of obtaining stability and reliability through a connection structure using a through-silicon-via (TSV). The semiconductor chip includes a semiconductor substrate and a through-silicon-via (TSV) structure penetrating through the semiconductor substrate. A connection pad includes a foundation base disposed on a lower surface of the semiconductor substrate and connected to the TSV structure. A protruding portion protrudes from the foundation base and extend to an inside of a first groove formed in a lower surface of the semiconductor substrate.