H01L2224/05671

FINGERPRINT SENSOR AND MANUFACTURING METHOD THEREOF
20230009679 · 2023-01-12 ·

A fingerprint sensor device and a method of making a fingerprint sensor device. As non-limiting examples, various aspects of this disclosure provide various fingerprint sensor devices, and methods of manufacturing thereof, that comprise a sensing area on a bottom side of a die without top side electrodes that senses fingerprints from the top side, and/or that comprise a sensor die directly electrically connected to conductive elements of a plate through which fingerprints are sensed.

Wafer-level package including under bump metal layer

A semiconductor package includes a semiconductor chip comprising a first surface and a second surface, a redistribution layer on the first surface of the semiconductor chip, an under bump metal (UBM) layer on the redistribution layer, and a solder bump on the UBM layer, and the solder bump covers both outer side surfaces of the UBM layer.

Wafer-level package including under bump metal layer

A semiconductor package includes a semiconductor chip comprising a first surface and a second surface, a redistribution layer on the first surface of the semiconductor chip, an under bump metal (UBM) layer on the redistribution layer, and a solder bump on the UBM layer, and the solder bump covers both outer side surfaces of the UBM layer.

LIGHT EMITTING APPARATUS AND METHOD FOR PRODUCING THE SAME
20230343909 · 2023-10-26 · ·

A light emitting apparatus includes: a mount substrate; one or more light emitting devices located above the mount substrate; a light conversion member located above the one or more light emitting devices; and a covering member that contains a light reflective material and covers the one or more light emitting devices. The light conversion member includes: a light emission surface facing upward, a lateral surface facing laterally, and a light receiving surface facing downward. The covering member covers the lateral surface of the light conversion member, and is interposed between the mount substrate and the one or more light emitting devices.

Method for fabricating semiconductor device with connecting structure
11527512 · 2022-12-13 · ·

The present application discloses a method for fabricating a semiconductor device. The method includes providing a first semiconductor structure; and forming a first connecting structure comprising a first connecting insulating layer on the first semiconductor structure, two first conductive layers in the first connecting insulating layer, and a first porous layer between the two first conductive layers; wherein a porosity of the first porous layer is between about 25% and about 100%.

Method for fabricating semiconductor device with connecting structure
11527512 · 2022-12-13 · ·

The present application discloses a method for fabricating a semiconductor device. The method includes providing a first semiconductor structure; and forming a first connecting structure comprising a first connecting insulating layer on the first semiconductor structure, two first conductive layers in the first connecting insulating layer, and a first porous layer between the two first conductive layers; wherein a porosity of the first porous layer is between about 25% and about 100%.

Interlocked redistribution layer interface for flip-chip integrated circuits

This disclosure provides an integrated circuit device that includes a RDL that is interlocked with a bump (or “pillar”). The interlocked interface provides the contact RDL-bump interface with increased structural stability that can better withstand the thermal stresses associated with high performance devices IC devices. The interlock structure mitigates crack/delamination that occurs at the RDL-bump interface in large IC chips that are generally subjected to higher stresses during operation.

Interlocked redistribution layer interface for flip-chip integrated circuits

This disclosure provides an integrated circuit device that includes a RDL that is interlocked with a bump (or “pillar”). The interlocked interface provides the contact RDL-bump interface with increased structural stability that can better withstand the thermal stresses associated with high performance devices IC devices. The interlock structure mitigates crack/delamination that occurs at the RDL-bump interface in large IC chips that are generally subjected to higher stresses during operation.

Metal paste for joints, assembly, production method for assembly, semiconductor device, and production method for semiconductor device

Provided is a metal paste for joints, containing: metal particles; and linear or branched monovalent aliphatic alcohol having 1 to 20 carbon atoms, in which the metal particles include sub-micro copper particles having a volume average particle diameter of 0.12 μm to 0.8 μM.

Metal paste for joints, assembly, production method for assembly, semiconductor device, and production method for semiconductor device

Provided is a metal paste for joints, containing: metal particles; and linear or branched monovalent aliphatic alcohol having 1 to 20 carbon atoms, in which the metal particles include sub-micro copper particles having a volume average particle diameter of 0.12 μm to 0.8 μM.