Semiconductor devices having one or more vias filled with an electrically conductive material are disclosed herein. In one embodiment, a semiconductor device includes a semiconductor substrate having a first side, a plurality of circuit elements proximate to the first side, and a second side opposite the first side. A via can extend between the first and second sides, and a conductive material in the via can extend beyond the second side of the substrate to define a projecting portion of the conductive material. The semiconductor device can have a tall conductive pillar formed over the second side and surrounding the projecting portion of the conductive material, and a short conductive pad formed over the first side and electrically coupled to the conductive material in the via.

In a described example, a method includes: forming a metal layer on a backside surface of a semiconductor wafer, the semiconductor wafer having semiconductor dies spaced apart by scribe lanes on an active surface of the semiconductor wafer opposite the backside surface; forming a layer with a modulus greater than about 4000 MPa up to about 8000 MPa over the metal layer; mounting the backside of the semiconductor wafer on a first side of a dicing tape having an adhesive; cutting through the semiconductor wafer, the metal layer, and the layer with a modulus greater than about 4000 MPa up to about 8000 MPa along scribe lanes; separating the semiconductor dies from the semiconductor wafer and from one another by stretching the dicing tape, expanding the cuts in the semiconductor wafer along the scribe lanes between the semiconductor dies; and removing the separated semiconductor dies from the dicing tape.

In a described example, a method includes: forming a metal layer on a backside surface of a semiconductor wafer, the semiconductor wafer having semiconductor dies spaced apart by scribe lanes on an active surface of the semiconductor wafer opposite the backside surface; forming a layer with a modulus greater than about 4000 MPa up to about 8000 MPa over the metal layer; mounting the backside of the semiconductor wafer on a first side of a dicing tape having an adhesive; cutting through the semiconductor wafer, the metal layer, and the layer with a modulus greater than about 4000 MPa up to about 8000 MPa along scribe lanes; separating the semiconductor dies from the semiconductor wafer and from one another by stretching the dicing tape, expanding the cuts in the semiconductor wafer along the scribe lanes between the semiconductor dies; and removing the separated semiconductor dies from the dicing tape.

A chip package which includes a chip, at least one first dielectric layer, at least one second dielectric layer, at least one conductive circuit, and at least one third dielectric layer is provide. The conductive circuit is formed by highly concentrated silver paste or copper paste filled in at least one first groove of the first dielectric layer and at least one second groove of the second dielectric layer while at least one die pad of the chip is electrically connected with the conductive circuit for improving electrical conduction efficiency of the conductive circuit. Moreover, at least one die-pad bump is formed in the first groove, arranged at and electrically connected with a surface of the die pad for protecting of the die pad.

Disclosed are barrier materials between bumps and pads, and related devices and methods. A semiconductor device includes an interconnect, a top material, a pad on the interconnect and at least a portion of the top material, a bump on the pad, and a barrier material between the pad and the bump. The top material defines a via therethrough to the interconnect. The pad includes electrically conductive material. The bump includes electrically conductive material. The bump is configured to electrically connect the interconnect to another device. The barrier material is between the pad and the bump. The barrier material includes a conductive material that is resistant to electromigration, intermetallic compound reaction, or both electromigration and intermetallic compound reaction.

Disclosed are barrier materials between bumps and pads, and related devices and methods. A semiconductor device includes an interconnect, a top material, a pad on the interconnect and at least a portion of the top material, a bump on the pad, and a barrier material between the pad and the bump. The top material defines a via therethrough to the interconnect. The pad includes electrically conductive material. The bump includes electrically conductive material. The bump is configured to electrically connect the interconnect to another device. The barrier material is between the pad and the bump. The barrier material includes a conductive material that is resistant to electromigration, intermetallic compound reaction, or both electromigration and intermetallic compound reaction.

Semiconductor devices having one or more vias filled with an electrically conductive material are disclosed herein. In one embodiment, a semiconductor device includes a semiconductor substrate having a first side, a plurality of circuit elements proximate to the first side, and a second side opposite the first side. A via can extend between the first and second sides, and a conductive material in the via can extend beyond the second side of the substrate to define a projecting portion of the conductive material. The semiconductor device can have a tall conductive pillar formed over the second side and surrounding the projecting portion of the conductive material, and a short conductive pad formed over the first side and electrically coupled to the conductive material in the via.

Semiconductor devices having one or more vias filled with an electrically conductive material are disclosed herein. In one embodiment, a semiconductor device includes a semiconductor substrate having a first side, a plurality of circuit elements proximate to the first side, and a second side opposite the first side. A via can extend between the first and second sides, and a conductive material in the via can extend beyond the second side of the substrate to define a projecting portion of the conductive material. The semiconductor device can have a tall conductive pillar formed over the second side and surrounding the projecting portion of the conductive material, and a short conductive pad formed over the first side and electrically coupled to the conductive material in the via.

In a described example, a method includes: forming a metal layer on a backside surface of a semiconductor wafer, the semiconductor wafer having semiconductor dies spaced apart by scribe lanes on an active surface of the semiconductor wafer opposite the backside surface; forming a layer with a modulus greater than about 4000 MPa up to about 8000 MPa over the metal layer; mounting the backside of the semiconductor wafer on a first side of a dicing tape having an adhesive; cutting through the semiconductor wafer, the metal layer, and the layer with a modulus greater than about 4000 MPa up to about 8000 MPa along scribe lanes; separating the semiconductor dies from the semiconductor wafer and from one another by stretching the dicing tape, expanding the cuts in the semiconductor wafer along the scribe lanes between the semiconductor dies; and removing the separated semiconductor dies from the dicing tape.

In a described example, a method includes: forming a metal layer on a backside surface of a semiconductor wafer, the semiconductor wafer having semiconductor dies spaced apart by scribe lanes on an active surface of the semiconductor wafer opposite the backside surface; forming a layer with a modulus greater than about 4000 MPa up to about 8000 MPa over the metal layer; mounting the backside of the semiconductor wafer on a first side of a dicing tape having an adhesive; cutting through the semiconductor wafer, the metal layer, and the layer with a modulus greater than about 4000 MPa up to about 8000 MPa along scribe lanes; separating the semiconductor dies from the semiconductor wafer and from one another by stretching the dicing tape, expanding the cuts in the semiconductor wafer along the scribe lanes between the semiconductor dies; and removing the separated semiconductor dies from the dicing tape.