A bonded structure can include a first element having a first conductive interface feature and a second element having a second conductive interface feature. An integrated device can be coupled to or formed with the first element or the second element. The first conductive interface feature can be directly bonded to the second conductive interface feature to define an interface structure. The interface structure can be disposed about the integrated device in an at least partially annular profile to connect the first and second elements.

A fan-out semiconductor package includes: a first interconnection member having a through-hole; a semiconductor chip disposed in the through-hole and having an active surface having connection pads disposed thereon and an inactive surface; a second interconnection member disposed on the first interconnection member and the active surface of the semiconductor chip and including a redistribution layer electrically connected to the connection pads; and an encapsulant encapsulating at least portions of the first interconnection member and the semiconductor chip. The first interconnection member includes a first insulating layer in contact with the second interconnection member, a first redistribution layer disposed on a surface of the first insulating layer in contact with the second interconnection member and electrically connected to the connection pads, and a blocking layer disposed on the surface of the first insulating layer on which the first redistribution layer is disposed and surrounding the through-hole.

A bonded structure can include a first element having a first conductive interface feature and a second element having a second conductive interface feature. An integrated device can be coupled to or formed with the first element or the second element. The first conductive interface feature can be directly bonded to the second conductive interface feature to define an interface structure. The interface structure can be disposed about the integrated device in an at least partially annular profile to connect the first and second elements.

An insulation chip includes first and second units bonded to each other. The first unit includes a first semiconductor substrate, a first element insulating layer including a first element front surface facing the second unit and a first element back surface, and first and fourth insulating elements buried in the first element insulating layer at positions spaced apart from the first element front surface. The second unit includes a second element insulating layer having a second element front surface and a second element back surface, and second and third insulating elements buried in the second element insulating layer at positions spaced apart from the second element front surface. When the second unit is bonded to the first unit, the first and second insulating elements are arranged to face each other, and the third and fourth insulating elements are arranged to face each other.

A fan-out semiconductor package includes: a first connection member having a through-hole; a semiconductor chip disposed in the through-hole and having an active surface having connection pads disposed thereon and an inactive surface opposing the active surface; an encapsulant encapsulating at least portions of the first connection member and the inactive surface of the semiconductor chip; a second connection member disposed on the first connection member and the active surface of the semiconductor chip; a resin layer disposed on the encapsulant; and a rear redistribution layer embedded in the encapsulant so that one surface thereof is exposed by the encapsulant, wherein the resin layer covers at least portions of the exposed one surface of the rear redistribution layer, and the rear redistribution layer is electrically connected to the redistribution layer of the first connection member through connection members formed in first openings penetrating through the resin layer and the encapsulant.

A bonded structure can include a first element having a first conductive interface feature and a second element having a second conductive interface feature. An integrated device can be coupled to or formed with the first element or the second element. The first conductive interface feature can be directly bonded to the second conductive interface feature to define an interface structure. The interface structure can be disposed about the integrated device in an at least partially annular profile to connect the first and second elements.

A bonded structure can include a first element having a first conductive interface feature and a second element having a second conductive interface feature. An integrated device can be coupled to or formed with the first element or the second element. The first conductive interface feature can be directly bonded to the second conductive interface feature to define an interface structure. The interface structure can be disposed about the integrated device in an at least partially annular profile to connect the first and second elements.

A semiconductor package includes a package substrate, semiconductor chips stacked on the package substrate, and electrical connectors that connect internal circuitry of each of the chips to the package substrate. Each of the semiconductor chips includes a chip selection pad for transmitting a chip selection signal to the internal circuitry of the semiconductor chip and a chip dummy pad, electrically isolated from the internal circuitry, along a first side of the semiconductor chip. The electrical connectors include a lower chip connector that electrically connects the package substrate to the chip selection pad of the lower semiconductor chip, a first auxiliary connector that electrically connects the package substrate to the chip dummy pad of the lower semiconductor chip, and a second auxiliary connector that electrically connects the chip dummy pad of the lower semiconductor chip to the chip selection pad of the upper semiconductor chip.

A display device includes a substrate and a first pad. The substrate includes a display area to display an image, and a pad area outside the display area. The first pad is in the pad area, and includes first pad terminals extending parallel to one another in a first direction. The first pad terminals include: first connection pad terminals arranged along a first column that forms a first slope angle with the first direction; second connection pad terminals spaced apart from the first connection pad terminals and arranged along a second column that forms a second slope angle with the first direction; and a first dummy pad terminal between a pair of adjacent first connection pad terminals among the first connection pad terminals along the first column. The first dummy pad terminal and the first connection pad terminals are in different layers than one another.

A fan-out semiconductor package includes: a first interconnection member having a through-hole; a semiconductor chip disposed in the through-hole and having an active surface having connection pads disposed thereon and an inactive surface; a second interconnection member disposed on the first interconnection member and the active surface of the semiconductor chip and including a redistribution layer electrically connected to the connection pads; and an encapsulant encapsulating at least portions of the first interconnection member and the semiconductor chip. The first interconnection member includes a first insulating layer in contact with the second interconnection member, a first redistribution layer disposed on a surface of the first insulating layer in contact with the second interconnection member and electrically connected to the connection pads, and a blocking layer disposed on the surface of the first insulating layer on which the first redistribution layer is disposed and surrounding the through-hole.