The invention relates to a measuring device for determining a course of a bonding wave in a gap (3) between a first substrate (2) and a second substrate (4).

Furthermore, the present invention relates to a corresponding method.

A package structure includes a first die, a die stack structure, a support structure and an insulation structure. The die stack structure is bonded to the first die. The support structure is disposed on the die stack structure. A width of the support structure is larger than a width of the die stack structure and less than a width of the first die. The insulation structure at least laterally wraps around the die stack structure and the support structure.

A power module includes: a plate-shaped thick copper substrate, a conductive stress relaxation metal layer disposed on the thick copper substrate, a semiconductor device disposed on the stress relaxation metal layer, and a plated layer disposed on the stress relaxation metal layer, wherein the semiconductor device is bonded to the stress relaxation metal layer via the plated layer. The thick copper substrate includes a first thick copper layer and a second thick copper layer disposed on the first thick copper layer, and the stress relaxation metal layer is disposed on the second thick copper layer. A part of the semiconductor device is embedded to be fixed to the stress relaxation metal layer. A bonded surface between the semiconductor device and the stress relaxation metal layer are integrated to each other by means of diffusion bonding or solid phase diffusion bonding.

An electronic device includes a substrate, a base substrate, a metal connection body, a support body, a metal body, and a via. The substrate includes one main surface with a functional element and is a piezoelectric substrate or a compound semiconductor substrate. The substrate is mounted on the base substrate such that the one main surface faces the base substrate. The metal body is in contact with the support body and includes at least a portion extending to outside the substrate in plan view from the support body. The via connects the portion of the metal body outside the substrate and the base substrate to each other and has a higher thermal conductivity than the substrate.

An electronic device includes a substrate, a base substrate, a metal connection body, a metal body, and a via. The substrate includes a first main surface provided with functional elements and is a piezoelectric substrate or a compound semiconductor substrate. The substrate is mounted on the base substrate such that a second main surface of the substrate opposite to the one main surface faces the base substrate. The metal body is provided at the first main surface of the substrate and includes at least a portion that extends to outside the substrate in plan view from the one main surface. The via connects the portion of the metal body outside the substrate and the base substrate to each other and has a higher thermal conductivity than the substrate.

A method of removing a substrate, comprising: forming a growth restrict mask with a plurality of striped opening areas directly or indirectly upon a GaN-based substrate; and growing a plurality of semiconductor layers upon the GaN-based substrate using the growth restrict mask, such that the growth extends in a direction parallel to the striped opening areas of the growth restrict mask, and growth is stopped before the semiconductor layers coalesce, thereby resulting in island-like semiconductor layers. A device is processed for each of the island-like semiconductor layers. Etching is performed until at least a part of the growth restrict mask is exposed. The devices are then bonded to a support substrate. The GaN-based substrate is removed from the devices by a wet etching technique that at least partially dissolves the growth restrict mask. The GaN substrate that is removed then can be recycled.

An electronic package and a method for fabricating an electronic package are provided. An encapsulation layer encapsulates a first electronic component and a plurality of conductive pillars, and is defined with a reservation region and a removal region adjacent to the reservation region. A circuit structure is disposed on the encapsulation layer. The removal region and the circuit structure therewithin are removed for an optical communication element to protrude from a lateral surface of the encapsulation layer when the optical communication element is disposed on the circuit structure, so as to avoid a packaging material used in a subsequent process from being adhered to a protruding portion of the optical communication element.

A semiconductor device includes: a substrate main body having a first surface and a second surface; an electric component arranged in the substrate main body; a first terminal and a second terminal arranged on the first surface or the second surface, respectively; a first internal conductor pattern arranged in a first circuit layer arranged between the electric component and the first surface, and electrically connected to the first terminal and the electric component; and a second internal conductor pattern arranged in a second circuit layer arranged between the electric component and the second surface, and electrically connected to the second terminal and the electric component. The first internal conductor pattern and the second internal conductor pattern are at least partially opposed to each other inside the substrate main body.

A semiconductor package with improved solderability at sidewall includes a chip, a molding compound encapsulating the chip, and multiple leads distributed at sidewalls of the semiconductor package. The leads are formed as a conductive layer that is electrically connected to bonding pads of the chip. Each of the leads has a stepped surface exposed from the molding compound, wherein the stepped surface is shaped by two sequentially overlapped photoresist layers. The stepped surface of each lead allows to accommodate more solder to enhance the reliability of a solder joint between the semiconductor and a printed circuit board. Therefore, the solder joints of the semiconductor package are easily inspected by automatic optical inspection (AOI) equipment.

A stacked assembly of semiconductor devices includes a mounting pad covering a first portion of a low-side semiconductor device, and a contact layer covering a second portion of the low-side semiconductor device. A first mounting clip electrically connected to the contact layer has a supporting portion joining the first mounting clip to a first lead frame portion. A second mounting clip attached to the mounting pad has a supporting portion joining the second mounting clip to a second lead frame portion. A high-side semiconductor device has a first terminal electrically connected to the first mounting clip and thereby to the contact layer, and a second terminal electrically connected to the second mounting clip.