A semiconductor package includes: a first substrate; a semiconductor chip mounted on the first substrate such that a circuit formation surface is oriented toward the first substrate; a second substrate arranged above the first substrate, the semiconductor chip being sandwiched between the first substrate and the second substrate; and a resin that seals the semiconductor chip and that is filled between the first substrate and the second substrate, wherein the second substrate includes a solder resist layer having a first surface facing a back surface that is an opposite surface of the circuit formation surface of the semiconductor chip, and wherein on an area of the first surface of the solder resist layer facing the back surface of the semiconductor chip, at least one protruding portion that protrudes towards the back surface of the semiconductor chip is provided.

A semiconductor package includes: a first substrate; a semiconductor chip mounted on the first substrate such that a circuit formation surface is oriented toward the first substrate; a second substrate arranged above the first substrate, the semiconductor chip being sandwiched between the first substrate and the second substrate; and a resin that seals the semiconductor chip and that is filled between the first substrate and the second substrate, wherein the second substrate includes a solder resist layer having a first surface facing a back surface that is an opposite surface of the circuit formation surface of the semiconductor chip, and wherein on an area of the first surface of the solder resist layer facing the back surface of the semiconductor chip, at least one protruding portion that protrudes towards the back surface of the semiconductor chip is provided.

There is provided a terminal that includes a first conductive layer; a wiring layer on the first conductive layer; a second conductive layer on the wiring layer; and a conductive bonding layer which is in contact with a bottom surface and a side surface of the first conductive layer, a side surface of the wiring layer, a portion of a side surface of the second conductive layer, and a portion of a bottom surface of the second conductive layer, wherein an end portion of the second conductive layer protrudes from an end portion of the first conductive layer and an end portion of the wiring layer, and wherein the conductive bonding layer is in contact with a bottom surface of the end portion of the second conductive layer.

There is provided a terminal that includes a first conductive layer; a wiring layer on the first conductive layer; a second conductive layer on the wiring layer; and a conductive bonding layer which is in contact with a bottom surface and a side surface of the first conductive layer, a side surface of the wiring layer, a portion of a side surface of the second conductive layer, and a portion of a bottom surface of the second conductive layer, wherein an end portion of the second conductive layer protrudes from an end portion of the first conductive layer and an end portion of the wiring layer, and wherein the conductive bonding layer is in contact with a bottom surface of the end portion of the second conductive layer.

A semiconductor package may include: a first semiconductor chip; a second semiconductor chip disposed over the first semiconductor chip; and a bump structure interposed between the first semiconductor chip and the second semiconductor chip to connect the first semiconductor chip and the second semiconductor chip, wherein the bump structure includes a core portion and a shell portion, the shell portion surrounding all side ails of the core portion, and wherein the shell portion has a higher melting point than the core portion.

A semiconductor package may include: a first semiconductor chip; a second semiconductor chip disposed over the first semiconductor chip; and a bump structure interposed between the first semiconductor chip and the second semiconductor chip to connect the first semiconductor chip and the second semiconductor chip, wherein the bump structure includes a core portion and a shell portion, the shell portion surrounding all side ails of the core portion, and wherein the shell portion has a higher melting point than the core portion.

A method of forming an integrated circuit package includes attaching a first die to an interposer. The interposer includes a first die connector and a second die connector on the interposer and a first dielectric layer covering at least one sidewall of the first die connector and at least one sidewall of the second die connector. The first die is coupled to the first die connector and to the first dielectric layer and the second die connector is exposed by the first die. The method further includes recessing the first dielectric layer to expose at least one sidewall of the second die connector and attaching a second die to the interposer, the second die being coupled to the second die connector.

A method of forming an integrated circuit package includes attaching a first die to an interposer. The interposer includes a first die connector and a second die connector on the interposer and a first dielectric layer covering at least one sidewall of the first die connector and at least one sidewall of the second die connector. The first die is coupled to the first die connector and to the first dielectric layer and the second die connector is exposed by the first die. The method further includes recessing the first dielectric layer to expose at least one sidewall of the second die connector and attaching a second die to the interposer, the second die being coupled to the second die connector.

A device includes a redistribution structure, a first semiconductor device, a first antenna, and a first conductive pillar on the redistribution structure that are electrically connected to the redistribution structure, an antenna structure over the first semiconductor device, wherein the antenna structure includes a second antenna that is different from the first antenna, wherein the antenna structure includes an external connection bonded to the first conductive pillar, and a molding material extending between the antenna structure and the redistribution structure, the molding material surrounding the first semiconductor device, the first antenna, the external connection, and the first conductive pillar.

A device includes a redistribution structure, a first semiconductor device, a first antenna, and a first conductive pillar on the redistribution structure that are electrically connected to the redistribution structure, an antenna structure over the first semiconductor device, wherein the antenna structure includes a second antenna that is different from the first antenna, wherein the antenna structure includes an external connection bonded to the first conductive pillar, and a molding material extending between the antenna structure and the redistribution structure, the molding material surrounding the first semiconductor device, the first antenna, the external connection, and the first conductive pillar.