Patent classifications
H01L2224/13172
Semiconductor Bonding Structures and Methods
A system and method for applying an underfill is provided. An embodiment comprises applying an underfill to a substrate and patterning the underfill. Once patterned other semiconductor devices, such as semiconductor dies or semiconductor packages may then be attached to the substrate through the underfill, with electrical connections from the other semiconductor devices extending into the pattern of the underfill.
Semiconductor device and method for manufacturing the same
A semiconductor device includes a substrate. A conductive layer is disposed on the substrate and extends in a first direction. An insulating layer is disposed on the conductive layer and exposes at least a portion of the conductive layer through a via hole. The via hole includes a first face extending in a first slope relative to a top face of the conductive layer. A second face extends in a second slope relative to the top face of the conductive layer that is less than the first slope. A redistribution conductive layer includes a first pad area disposed in the via hole. A line area at least partially extends along the first face and the second face. The first face directly contacts the conductive layer. The second face is positioned at a higher level than the first face in a second direction perpendicular to a top face of the substrate.
Scheme for connector site spacing and resulting structures
A system and method for preventing cracks in a passivation layer is provided. In an embodiment a contact pad has a first diameter and an opening through the passivation layer has a second diameter, wherein the first diameter is greater than the second diameter by a first distance of about 10 m. In another embodiment, an underbump metallization is formed through the opening, and the underbump metallization has a third diameter that is greater than the first diameter by a second distance of about 5 m. In yet another embodiment, a sum of the first distance and the second distance is greater than about 15 m. In another embodiment the underbump metallization has a first dimension that is less than a dimension of the contact pad and a second dimension that is greater than a dimension of the contact pad.
Scheme for connector site spacing and resulting structures
A system and method for preventing cracks in a passivation layer is provided. In an embodiment a contact pad has a first diameter and an opening through the passivation layer has a second diameter, wherein the first diameter is greater than the second diameter by a first distance of about 10 m. In another embodiment, an underbump metallization is formed through the opening, and the underbump metallization has a third diameter that is greater than the first diameter by a second distance of about 5 m. In yet another embodiment, a sum of the first distance and the second distance is greater than about 15 m. In another embodiment the underbump metallization has a first dimension that is less than a dimension of the contact pad and a second dimension that is greater than a dimension of the contact pad.
SEMICONDUCTOR DEVICE, SEMICONDUCTOR PACKAGE INCLUDING SEMICONDUCTOR DEVICE, AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
A semiconductor device including a high-reliability bump structure including a pillar structure is provided. The semiconductor device includes a substrate, a connection pad on the substrate, and a bump structure on the connection pad, wherein the bump structure includes a pillar structure having a side wall and an upper surface, a metal protection film including a first portion extending along the side wall of the pillar structure and a second portion extending along the upper surface of the pillar structure, and a solder layer on the second portion of the metal protection film.
SEMICONDUCTOR DEVICE, SEMICONDUCTOR PACKAGE INCLUDING SEMICONDUCTOR DEVICE, AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
A semiconductor device including a high-reliability bump structure including a pillar structure is provided. The semiconductor device includes a substrate, a connection pad on the substrate, and a bump structure on the connection pad, wherein the bump structure includes a pillar structure having a side wall and an upper surface, a metal protection film including a first portion extending along the side wall of the pillar structure and a second portion extending along the upper surface of the pillar structure, and a solder layer on the second portion of the metal protection film.
REVERSABLE ATTACHMENT SYSTEM
A reversable attachment system includes an adhesion layer, an inter-substrate bond structure, a mating layer and an extension actuator. The adhesion layer is configured to attach to a first substrate. The inter-substrate bond structure is coupled to the adhesion layer. The mating layer is configured to attach to a second substrate. The extension actuator is configured to attach to the second substrate and expand in response to an absorption of a gas. The inter-substrate bond structure is configured to form an initial thermocompression bond with the mating layer in response to an applied pressure and an applied heat. The expansion of the extension actuator in response to absorbing the gas detaches the inter-substrate bond structure from the mating layer.
Semiconductor structures and methods for forming the same
The present disclosure relates to the technical field of semiconductor packaging, and discloses a semiconductor structure and a method for forming the same. The method includes: providing a chip, the chip having interconnect structures on its surface, the top of the interconnect structures having an exposed fusible portion; providing a substrate, the substrate having conductive structures on its surface; patterning the conductive structures so that edges of the conductive structures have protrusions; combining the chip with the substrate.
Semiconductor structures and methods for forming the same
The present disclosure relates to the technical field of semiconductor packaging, and discloses a semiconductor structure and a method for forming the same. The method includes: providing a chip, the chip having interconnect structures on its surface, the top of the interconnect structures having an exposed fusible portion; providing a substrate, the substrate having conductive structures on its surface; patterning the conductive structures so that edges of the conductive structures have protrusions; combining the chip with the substrate.
Method for producing metal ball, joining material, and metal ball
Produced is a metal ball which suppresses an emitted dose. Contained are the steps of melting a pure metal by heating the pure metal at a temperature which is higher than a boiling point of an impurity to be removed, higher than a melting point of the pure metal, and lower than a boiling point of the pure metal, the pure metal containing a U content of 5 ppb or less, a Th content of 5 ppb or less, purity of 99.9% or more and 99.995% or less, and a Pb or Bi content or a total content of Pb and Bi of 1 ppm or more, and the pure metal having the boiling point higher than the boiling point at atmospheric pressure of the impurity to be removed; and sphering the molten pure metal in a ball.