An adhesive for a semiconductor, comprising an epoxy resin, a curing agent, and a compound having a group represented by the following formula (1): ##STR00001##
wherein R.sup.1 represents an electron-donating group.

An anisotropic conductive film whereby electrically conductive particles can be sufficiently captured at each connection terminal while suppressing the occurrence of shorts and conduction reliability can be improved even in cases where connecting finely pitched connection terminals. The anisotropic conductive film has a structure in which electrically conductive particle units in which electrically conductive particles are arranged in a row, or electrically conductive particle units in which electrically conductive particles are arranged in a row and independent electrically conductive particles are disposed in a lattice form in an electrically insulating adhesive layer. The shortest distance La between electrically conductive particles selected from adjacent electrically conductive particle units and the independent electrically conductive particles is not less than 0.5 times the particle diameter of the electrically conductive particles and.

An anisotropic conductive film whereby electrically conductive particles can be sufficiently captured at each connection terminal while suppressing the occurrence of shorts and conduction reliability can be improved even in cases where connecting finely pitched connection terminals. The anisotropic conductive film has a structure in which electrically conductive particle units in which electrically conductive particles are arranged in a row, or electrically conductive particle units in which electrically conductive particles are arranged in a row and independent electrically conductive particles are disposed in a lattice form in an electrically insulating adhesive layer. The shortest distance La between electrically conductive particles selected from adjacent electrically conductive particle units and the independent electrically conductive particles is not less than 0.5 times the particle diameter of the electrically conductive particles and.

An integrated circuit device includes a semiconductor substrate; and a pad region over the semiconductor substrate. The integrated circuit device further includes an under-bump-metallurgy (UBM) layer over the pad region. The integrated circuit device further includes a conductive pillar on the UBM layer, wherein the conductive pillar has a sidewall surface and a top surface. The integrated circuit device further includes a protection structure over the sidewall surface of the conductive pillar, wherein sidewalls of the UBM layer are substantially free of the protection structure, and the protection structure is a non-metal material.

A system and method for preventing cracks is provided. An embodiment comprises placing crack stoppers into a connection between a semiconductor die and a substrate. The crack stoppers may be in the shape of hollow or solid cylinders and may be placed so as to prevent any cracks from propagating through the crack stoppers.

A system and method for preventing cracks is provided. An embodiment comprises placing crack stoppers into a connection between a semiconductor die and a substrate. The crack stoppers may be in the shape of hollow or solid cylinders and may be placed so as to prevent any cracks from propagating through the crack stoppers.

A semiconductor wafer has a plurality of semiconductor die with contact pads for electrical interconnect. An insulating layer is formed over the semiconductor wafer. A bump structure is formed over the contact pads. The bump structure has a buffer layer formed over the insulating layer and contact pad. A portion of the buffer layer is removed to expose the contact pad and an outer portion of the insulating layer. A UBM layer is formed over the buffer layer and contact pad. The UBM layer follows a contour of the buffer layer and contact pad. A ring-shaped conductive pillar is formed over the UBM layer using a patterned photoresist layer filled with electrically conductive material. A conductive barrier layer is formed over the ring-shaped conductive pillar. A bump is formed over the conductive barrier layer. The buffer layer reduces thermal and mechanical stress on the bump and contact pad.

A semiconductor wafer has a plurality of semiconductor die with contact pads for electrical interconnect. An insulating layer is formed over the semiconductor wafer. A bump structure is formed over the contact pads. The bump structure has a buffer layer formed over the insulating layer and contact pad. A portion of the buffer layer is removed to expose the contact pad and an outer portion of the insulating layer. A UBM layer is formed over the buffer layer and contact pad. The UBM layer follows a contour of the buffer layer and contact pad. A ring-shaped conductive pillar is formed over the UBM layer using a patterned photoresist layer filled with electrically conductive material. A conductive barrier layer is formed over the ring-shaped conductive pillar. A bump is formed over the conductive barrier layer. The buffer layer reduces thermal and mechanical stress on the bump and contact pad.

The present disclosure relates to a semiconductor package structure, including a die and a package substrate. The die includes a semiconductor substrate, multiple interconnect metal layers, and at least one inter-level dielectric disposed between ones of the interconnect metal layers. Each inter-level dielectric is formed of a low k material. An outermost interconnect metal layer has multiple first conductive segments exposed from a surface of the inter-level dielectric. The package substrate includes a substrate body and multiple second conductive segments exposed from a surface of the substrate body. The second conductive segments are electrically connected to the first conductive segments.

A structure comprises a plurality of top pads protruding over a top surface of a package substrate, wherein a top pad comprises a first half-circle portion, a second half-circle portion and a first rectangular portion between the first half-circle portion and the second half-circle portion, a plurality of bottom pads embedded in the package substrate, wherein a bottom pad comprises a third half-circle portion, a fourth half-circle portion and a second rectangular portion between the third half-circle portion and the fourth half-circle portion and a plurality of vias coupled between the top pads and their respective bottom pads.