Methods, systems, apparatus, and articles of manufacture to reduce intermetallic compound formation in integrated circuit packages are disclosed. An example package substrate includes a buildup layer including a metal pad, an interconnect bridge embedded in the buildup layer, the interconnect bridge including a first contact pad on a first side of the interconnect bridge and a second contact pad on a second side of the interconnect bridge, the second side opposite the first side, and solder positioned between the metal pad and the first contact pad, the solder to electrically couple the metal pad and the first contact pad, a weight percent of nickel in any layer of material between the metal pad and the first contact pad being less than a threshold.

A solder composition includes a solder paste including a tin (Sn)-bismuth (Bi) alloy and/or a tin (Sn)-silver (Ag)-copper (Cu) alloy and a plurality of nanoparticles dispersed in the solder paste, wherein each of the nanoparticles includes a core that is spherical, the core includes a metal oxide, and the metal oxide has a density of 7 g/cm.sup.3 or more and a melting point of 2000 C. or higher.

A microelectronic device includes a die with input/output (I/O) terminals, and a dielectric layer on the die. The microelectronic device includes electrically conductive pillars which are electrically coupled to the I/O terminals, and extend through the dielectric layer to an exterior of the microelectronic device. Each pillar includes a column electrically coupled to one of the I/O terminals, and a head contacting the column at an opposite end of the column from the I/O terminal. The head extends laterally past the column in at least one lateral direction. Methods of forming the pillars and the dielectric layer are disclosed.

A microelectronic device includes a die with input/output (I/O) terminals, and a dielectric layer on the die. The microelectronic device includes electrically conductive pillars which are electrically coupled to the I/O terminals, and extend through the dielectric layer to an exterior of the microelectronic device. Each pillar includes a column electrically coupled to one of the I/O terminals, and a head contacting the column at an opposite end of the column from the I/O terminal. The head extends laterally past the column in at least one lateral direction. Methods of forming the pillars and the dielectric layer are disclosed.

A structure including a substrate having a conductive pad and a connecting structure disposed on the conductive pad and electrically connected to the conductive pad. The connecting structure includes a first metallic layer disposed on the conductive pad, a first intermetallic compound layer disposed on the first metallic layer, a second intermetallic compound layer disposed on the first intermetallic compound layer and a second metallic layer disposed on the second intermetallic compound layer. The first metallic layer comprises copper. The first intermetallic compound layer comprises a first intermetallic compound. The second intermetallic compound layer comprises a second intermetallic compound different from the first intermetallic compound. The second metallic layer comprises tin. The first intermetallic compound contains copper, tin and one of nickel and cobalt.

A microelectronic device has a bump bond structure including an electrically conductive pillar with an expanded head, and solder on the expanded head. The electrically conductive pillar includes a column extending from an I/O pad to the expanded head. The expanded head extends laterally past the column on at least one side of the electrically conductive pillar. In one aspect, the expanded head may have a rounded side profile with a radius approximately equal to a thickness of the expanded head, and a flat top surface. In another aspect, the expanded head may extend past the column by different lateral distances in different lateral directions. In a further aspect, the expanded head may have two connection areas for making electrical connections to two separate nodes. Methods for forming the microelectronic device are disclosed.

A microelectronic device has a bump bond structure including an electrically conductive pillar with an expanded head, and solder on the expanded head. The electrically conductive pillar includes a column extending from an I/O pad to the expanded head. The expanded head extends laterally past the column on at least one side of the electrically conductive pillar. In one aspect, the expanded head may have a rounded side profile with a radius approximately equal to a thickness of the expanded head, and a flat top surface. In another aspect, the expanded head may extend past the column by different lateral distances in different lateral directions. In a further aspect, the expanded head may have two connection areas for making electrical connections to two separate nodes. Methods for forming the microelectronic device are disclosed.