A packaged semiconductor device with a particle roughened surface on a portion of the lead frame that improves adhesion between the molding compound and the lead frame. A packaged semiconductor device with a particle roughened surface on a portion of the lead frame that improves adhesion between the molding compound and the lead frame and with a reflow wall that surrounds a portion of the solder joint that couples the semiconductor device to the lead frame. A packaged semiconductor device with a reflow wall that surrounds a portion of a solder joint that couples a semiconductor device to a lead frame.

A packaged semiconductor device with a particle roughened surface on a portion of the lead frame that improves adhesion between the molding compound and the lead frame. A packaged semiconductor device with a particle roughened surface on a portion of the lead frame that improves adhesion between the molding compound and the lead frame and with a reflow wall that surrounds a portion of the solder joint that couples the semiconductor device to the lead frame. A packaged semiconductor device with a reflow wall that surrounds a portion of a solder joint that couples a semiconductor device to a lead frame.

A printed circuit board including an electronic component and a method of producing the same are provided. The printed circuit board includes a multilayered substrate including an insulation layer and an inner circuit layer laminated therein, a cavity disposed in the multilayered substrate, a via disposed in the insulation layer and configured to electrically connect the inner circuit layer with another inner circuit layer, a first electronic component inserted in the cavity, and a bump pad disposed on a surface of the cavity facing the first electronic component, and the bump pad is formed by having the insulation layer and the via exposed to a lateral side of the cavity.

A printed circuit board including an electronic component and a method of producing the same are provided. The printed circuit board includes a multilayered substrate including an insulation layer and an inner circuit layer laminated therein, a cavity disposed in the multilayered substrate, a via disposed in the insulation layer and configured to electrically connect the inner circuit layer with another inner circuit layer, a first electronic component inserted in the cavity, and a bump pad disposed on a surface of the cavity facing the first electronic component, and the bump pad is formed by having the insulation layer and the via exposed to a lateral side of the cavity.

A semiconductor component includes a semiconductor package having a mountable face, a bump, and a coating part. The bump is made of first solder and is formed on the mountable face. The coating part formed of a first composition containing solder powder made of second solder, a flux component, and a first thermosetting resin binder coats the top end of the bump.

A semiconductor component includes a semiconductor package having a mountable face, a bump, and a coating part. The bump is made of first solder and is formed on the mountable face. The coating part formed of a first composition containing solder powder made of second solder, a flux component, and a first thermosetting resin binder coats the top end of the bump.

An apparatus relates generally to a microelectronic device. In such an apparatus, a first substrate has a first surface with first interconnects located on the first surface, and a second substrate has a second surface spaced apart from the first surface with a gap between the first surface and the second surface. Second interconnects are located on the second surface. Lower surfaces of the first interconnects and upper surfaces of the second interconnects are coupled to one another for electrical conductivity between the first substrate and the second substrate. A conductive collar is around sidewalls of the first and second interconnects, and a dielectric layer is around the conductive collar.

Anisotropic conductive film (ACF) structures and manufacturing methods for forming the same are described. The manufacturing methods include preventing clusters of conductive particles from forming between adjacent bonding pads and that are associated with electrical shorting of ACF structures. In some embodiments, the methods involve use of multiple layered ACF materials that include a non-electrically conductive layer that reduces the likelihood of formation of conductive particle clusters between bonding pads. In some embodiment, the methods include the use of ultraviolet sensitive ACF material combined with lithography techniques that eliminate conductive particles from between neighboring bonding pads. In some embodiments, the methods involve the use of insulation spacers that block conductive particles from entering between bonding pads. Any suitable combination of the described methods can be used.

Anisotropic conductive film (ACF) structures and manufacturing methods for forming the same are described. The manufacturing methods include preventing clusters of conductive particles from forming between adjacent bonding pads and that are associated with electrical shorting of ACF structures. In some embodiments, the methods involve use of multiple layered ACF materials that include a non-electrically conductive layer that reduces the likelihood of formation of conductive particle clusters between bonding pads. In some embodiment, the methods include the use of ultraviolet sensitive ACF material combined with lithography techniques that eliminate conductive particles from between neighboring bonding pads. In some embodiments, the methods involve the use of insulation spacers that block conductive particles from entering between bonding pads. Any suitable combination of the described methods can be used.

An object of the present technology is to prevent damage in a bonded portion between a semiconductor chip and a substrate in a semiconductor device in which the semiconductor chip is mounted on the substrate. A terminal is disposed between an electrode of an element and an electrode of a substrate on which the element is mounted, and electrically connects the electrode of the element and the electrode of the substrate. The terminal includes a plurality of unit lattices and a coupling portion. The unit lattices included in the terminal are formed by bonding a plurality of beams in a cube shape. The coupling portion included in the terminal couples adjacent unit lattices among the plurality of unit lattices.