Provided is a semiconductor device including a conductive member including a main surface facing one side in a thickness direction; a semiconductor element including a plurality of pads facing the main surface of the conductive member; and a plurality of electrodes protruding from the plurality of pads toward the other side in the thickness direction. The conductive member includes a plurality of recessed portions recessed from the main surface toward the other side in the thickness direction. The semiconductor device further includes a bonding layer that is conductive and that is arranged in each of the plurality of recessed portions. The plurality of electrodes are separately inserted into the plurality of recessed portions. The conductive member and the plurality of electrodes are bonded through the bonding layers.

According to various embodiments, a chip carrier may include: a chip supporting region configured to support a chip; a chip contacting region including at least one contact pad for electrically contacting the chip; wherein the chip carrier is thinned in the chip contacting region such that a first thickness of the chip carrier at the at least one contact pad is smaller than a second thickness of the chip carrier in the chip supporting region.

Methods and apparatus to mitigate cracking in glass cores are disclosed. An example apparatus comprises a glass core having an opening extending between opposing surfaces of the glass core, and a metal within the opening. a gap between an interface of the metal and a sidewall of the opening.

A method of attaching a microelectronic element to a substrate can include aligning the substrate with a microelectronic element, the microelectronic element having a plurality of spaced-apart electrically conductive bumps each including a bond metal, and reflowing the bumps. The bumps can be exposed at a front surface of the microelectronic element. The substrate can have a plurality of spaced-apart recesses extending from a first surface thereof. The recesses can each have at least a portion of one or more inner surfaces that are non-wettable by the bond metal of which the bumps are formed. The reflowing of the bumps can be performed so that at least some of the bond metal of each bump liquefies and flows at least partially into one of the recesses and solidifies therein such that the reflowed bond material in at least some of the recesses mechanically engages the substrate.

According to various embodiments, a chip carrier may include: a chip supporting region configured to support a chip; a chip contacting region including at least one contact pad for electrically contacting the chip; wherein the chip carrier is thinned in the chip contacting region such that a first thickness of the chip carrier at the at least one contact pad is smaller than a second thickness of the chip carrier in the chip supporting region.

Provided are a light emitting device package, a backlight unit, a lighting device and its manufacturing method. The light emitting device package may include a flip chip type light emitting device having a first pad and a second pad, a lead frame that includes a first electrode disposed at one side of an electrode separation space, and a second electrode disposed at the other side of the electrode separation space, and on which the light emitting device is mounted, a first bonding medium formed between the first pad of the light emitting device and the first electrode of the lead frame to electrically connect the first pad and the first electrode, and a second bonding medium formed between the second pad of the light emitting device and the second electrode of the lead frame to electrically connect the second pad and the second electrode, wherein at least one first accommodating cup capable of accommodating the first bonding medium is formed in the first electrode of the lead frame, wherein at least one second accommodating cup capable of accommodating the second bonding medium is formed in the second electrode of the lead frame, and wherein at least one air discharge path is formed on each of the first and second accommodating cups.

A semiconductor device is provided. The semiconductor device includes a leadframe having a plurality of leads. A first lead of the plurality of leads has a lead pad formed between a distal portion and a proximal portion of the first lead. A semiconductor die includes a plurality of bond pads located at an active side. Each bond pad of the plurality is connected to a respective lead of the plurality of leads. An encapsulant encapsulates the semiconductor die and at least a portion of the leadframe. A distal portion of each lead is exposed through the encapsulant at a first major side. The lead pad is exposed through the encapsulant at a second major side opposite of the first major side.

An IC (integrated circuit) package includes a first interconnect. The first interconnect includes a first surface comprising connection pads. The connection pads include cavity pillars on the first surface and the cavity pillars include a recess in the first surface with a pillar in a center region of a respective cavity pillar. The first interconnect includes a second surface opposing the first surface having connection pads for leads. The IC package includes a second interconnect with the leads mounted on the connection pads of the second surface of the first interconnect. The IC package also includes a die mounted with solder bumps on the connection pads of the first surface of the first interconnect. A portion of the solder bumps flow over the cavity pillars.