An electronic device is provided. The electronic device includes a first electronic component, a plurality of second electronic components, and a plurality of conductive elements. The plurality of second electronic components are disposed under the first electronic component. The plurality of conductive elements electrically connect the first electronic component to the plurality of second electronic components. The plurality of conductive elements are free from vertically overlapping the plurality of second electronic components.

Some features pertain to an integrated device that includes a die and a first redistribution portion coupled to the die. The first redistribution portion includes at least one dielectric layer and a capacitor. The capacitor includes a first plate, a second plate, and an insulation layer located between the first plate and the second plate. The first redistribution portion further includes several first pins coupled to the first plate of the capacitor. The first redistribution portion further includes several second pins coupled to the second plate of the capacitor. In some implementations, the capacitor includes the first pins and/or the second pins. In some implementations, at least one pin from the several first pins traverses through the second plate to couple to the first plate of the capacitor. In some implementations, the second plate comprises a fin design.

There is provided a flexible electronic structure for bonding with an external circuit. The flexible electronic structure comprising: a flexible body having a first surface, the flexible body comprising at least one electronic component; at least one contact element configured to bond with the external circuit, the at least one contact element operatively coupled with the at least one electronic component and provided at the first surface of the flexible body, and arranged to operably interface with the external circuit after bonding, and at least one support element provided at the first surface of the flexible body, each support element arranged to contact a corresponding surface element disposed on a first surface of an external structure comprising the external circuit.

A voltage regulator having a coil inductor is integrated or embedded in a system-on-chip (SOC) device. The coil inductor is fabricated on an inductor wafer with through vias, and the inductor wafer is joined with an SOC wafer for integration with the SOC device.

A semiconductor package includes a redistribution substrate, a glass substrate mounted on the redistribution substrate and including a cavity in a central portion of the glass substrate, a bridge die in the cavity, a first semiconductor chip and a second semiconductor chip, the first semiconductor chip and the second semiconductor chip side by side, on the glass substrate, and the first semiconductor chip and the second semiconductor chip on the bridge die, a mold layer covering a top surface of the redistribution substrate, the glass substrate, the bridge die, the first semiconductor chip and the second semiconductor chip, and internal connection terminals connecting the glass substrate and the bridge die to the first and second semiconductor chips. The glass substrate includes a plurality of connection vias. A distance between an outer side surface of the glass substrate and a side surface of the mold layer ranges from 30 m to 500 m.

A method of making an assembly can include juxtaposing a top surface of a first electrically conductive element at a first surface of a first substrate with a top surface of a second electrically conductive element at a major surface of a second substrate. One of: the top surface of the first conductive element can be recessed below the first surface, or the top surface of the second conductive element can be recessed below the major surface. Electrically conductive nanoparticles can be disposed between the top surfaces of the first and second conductive elements. The conductive nanoparticles can have long dimensions smaller than 100 nanometers. The method can also include elevating a temperature at least at interfaces of the juxtaposed first and second conductive elements to a joining temperature at which the conductive nanoparticles can cause metallurgical joints to form between the juxtaposed first and second conductive elements.

There is provided a flexible electronic structure for bonding with an external circuit, comprising a flexible substrate, having a first surface, configured for bonding with the external circuit, and an opposing second surface, configured for engagement with a bonding tool, comprising at least one electronic component; at least one contact member, operatively coupled with said at least one electronic component and provided at said first surface of said flexible substrate, and adapted to operably interface with the external circuit after bonding, and at least one shield member, provided at said first surface so as to shieldingly overlap at least a portion of said at least one electronic component, adapted to withstand a predetermined pressure applied to said first surface and/or said opposing second surface during bonding with the external circuit.

A semiconductor package may include a first redistribution structure, a first semiconductor die on the first redistribution structure, a second semiconductor die on the front side redistribution structure and side-by-side with the first semiconductor die, a substrate on the front side redistribution structure and surrounding each of the first semiconductor die and the second semiconductor die, a bridge die on the substrate, a second redistribution structure on the substrate and around the bridge die, a third semiconductor die on the second redistribution structure and on the bridge die, and a fourth semiconductor die on the second redistribution structure and on the bridge die.

A semiconductor device is described that includes an integrated circuit coupled to a first semiconductor substrate with a first set of passive devices (e.g., inductors) on the first substrate. A second semiconductor substrate with a second set of passive devices (e.g., capacitors) may be coupled to the first substrate. Interconnects in the substrates may allow interconnection between the substrates and the integrated circuit. The passive devices may be used to provide voltage regulation for the integrated circuit. The substrates and integrated circuit may be coupled using metallization.

A method for fabricating a thin-film integrated circuit, IC, including a plurality of electronic components, the method comprising: forming, using a first fabrication technique, the plurality of electronic components, and forming, using a second fabrication technique, a conductive layer on the plurality of electronic components to form a redistribution layer, RDL, wherein the first fabrication technique includes photolithographic patterning, and the first fabrication technique is different to the second fabrication technique.